SNJ54AHCT373W ,Octal Transparent D-type Latches With 3-State Outputs SN54AHCT373, SN74AHCT373 OCTAL TRANSPARENT D-TYPE LATCHESWITH 3-STATE OUTPUTSSCLS239M – OCTOBER 19 ..
SNJ54ALS/299FK ,8-Bit Universal Shift/Storage Registers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SNJ54ALS00AFK ,Quadruple 2-Input Positive-NAND Gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SNJ54ALS-00AFK ,Quadruple 2-Input Positive-NAND Gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SNJ54ALS00AJ ,Quadruple 2-Input Positive-NAND Gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SNJ54ALS02AFK ,Quadruple 2-Input Positive-NOR Gateselectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
SPX29302T5-L , 3A Guaranteed Output Current
SPX2940T-2.5 , 1A Low Dropout Voltage Regulator Fixed Output, Fast Response
SPX2940T-5.0 , 1A Low Dropout Voltage Regulator Fixed Output, Fast Response
SPX2941U5 , 1A Low Dropout Voltage Regulator, Adjustable Output, Fast Response
SPX29500U-3.3 , 5A Low Dropout Voltage Regulator Adjustable & Fixed Output, Fast Response Time
SPX29503T5 , 5A Low Dropout Voltage Regulator Adjustable & Fixed Output, Fast Response Time
SNJ54AHCT373W
Octal Transparent D-type Latches With 3-State Outputs
description/ordering informationThe ’AHCT373 devices are octal-transparent D-type latches. When the latch-enable (LE) input is high, the Q
outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive bus lines without
interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
