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SNJ54ABT573FKTI N/a6avaiOctal Transparent D-type Latches With 3-State Outputs
SNJ54ABT573WYIN/a25avaiOctal Transparent D-type Latches With 3-State Outputs


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SNJ54ABT573FK-SNJ54ABT573W
Octal D-Type Latch with TRI-STATE Outputs
SN54ABT573, SN74ABT573A
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS190F − JANUARY 1991 − REVISED SEPTEMBER 2003 Typical VOLP (Output Ground Bounce)
<1 V at VCC = 5 V, TA = 25°C
High-Drive Outputs (−32-mA IOH, 64-mA IOL) Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD 17
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)

GND
VCC
SN54ABT573 ...J OR W PACKAGE
SN74ABT573A... DB, DW, N, NS,
OR PW PACKAGE
(TOP VIEW)
21 2019
SN54ABT573...FK PACKAGE
(TOP VIEW)1DOE7Q
GND
SN74ABT573A... RGY PACKAGE
(TOP VIEW)

120 11
GND
description/ordering information

These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively
low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
ORDERING INFORMATION
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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