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SN75LVDS390DR-SN75LVDS390PW-SN75LVDS390PWR Fast Delivery,Good Price
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Partno Mfg Dc Qty AvailableDescript
SN75LVDS390DRTIN/a1157avaiQuad LVDS Receiver
SN75LVDS390PWTI ?N/a1710avaiQuad LVDS Receiver
SN75LVDS390PWRTIN/a3000avaiQuad LVDS Receiver
SN75LVDS390PWRTEXASN/a822avaiQuad LVDS Receiver


SN75LVDS390PWR ,Quad LVDS ReceiverElectrical Characteristics....... 914.3 Related Links.. 298.6 Switching Characteristics.... 1014.4 ..
SN75LVDS390PWR ,Quad LVDS Receiverelectrical characteristics of low-voltage differentialRequirements of ANSI TIA/EIA-644 Standardsign ..
SN75LVDS82 ,FlatLink(TM) ReceiverFeatures... 19.3 Feature Description.... 132 Applications..... 19.4 Device Functional Modes.... 143 ..
SN75LVDS82DGG ,FlatLink(TM) ReceiverFeatures 3 DescriptionThe SN75LVDS82 FlatLink™ receiver contains four1• 4:28 Data Channel Expansion ..
SN75LVDS82DGGR ,FlatLink(TM) ReceiverMaximum Ratings . 512 Layout.... 197.2 ESD Ratings........ 512.1 Layout Guidelines.... 197.3 Recomm ..
SN75LVDS83 ,FlatLink(TM) TransmitterNot Recommended for New Designs  SLLS271I − MARCH 1997 − REVISED MAY 200 ..
SPN3402S23RG , N-Channel Enhancement Mode MOSFET
SPN3414S23RG , N-Channel Enhancement Mode MOSFET
SPN3446ST6RG , N-Channel Enhancement Mode MOSFET
SPN3456ST6RG , N-Channel Enhancement Mode MOSFET
SPN4412S8RG , N-Channel Enhancement Mode MOSFET
SPN4412S8RG , N-Channel Enhancement Mode MOSFET


SN75LVDS390DR-SN75LVDS390PW-SN75LVDS390PWR
Quad LVDS Receiver
Controller
Target
Controller
Target
Host Balanced InterconnectPower Power
DBn–3
DBn–2
DBn–1
DBn
DB2
DBn–3
DBn–2
DBn–1
DBn

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SN65LVDS386, SN65LVDS388A
SN65LVDS390, SN65LVDT386, SN65LVDT388A, SN65LVDT390, SN75LVDS386
SN75LVDS388A, SN75LVDS390, SN75LVDT386, SN75LVDT388A, SN75LVDT390

SLLS394I –SEPTEMBER 1999–REVISED DECEMBER 2014
SNx5LVDx3xx High-Speed Differential Line Receivers Features 3 Description

This familyof 4-, 8-,or 16-differential line receivers Four- ('390), Eight- ('388A),or Sixteen- ('386) Line (with optional integrated termination) implements theReceivers Meetor Exceed the electrical characteristics of low-voltage differentialRequirementsof ANSI TIA/EIA-644 Standard signaling (LVDS). This signaling technique lowers the• Integrated 110-Ω Line Termination Resistorson output voltage levels of 5-V differential standardLVDT Products levels (such as EIA/TIA-422B)to reduce the power,
increase the switching speeds, and allow operation• Designedfor Signaling Rates Upto 250 Mbps
witha 3-V supply rail.• SN65 Versions Bus-Terminal ESD ExceedskV Device Information(1) Operates Froma Single 3.3-V Supply Typical Propagation Delay Timeof 2.6ns Output Skew 100ps (Typical) Part-To-Part SkewIs Less Than1ns LVTTL Levels Are 5-V Tolerant Open-Circuit Fail Safe Flow-Through Pinout• Packagedin Thin Shrink Small-Outline
Package With 20-mil Terminal Pitch2 Applications Wireless Infrastructure• Telecom Infrastructure• Printer
(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Typical Application Schematic
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