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Home ›  SS77 > SN74LVTH273DBR-SN74LVTH273DW-SN74LVTH273DWR-SN74LVTH273DWRE4-SN74LVTH273PW-SN74LVTH273PWG4-SN74LVTH273PWR,3.3-V ABT Octal D-Type Flip-Flops With Clear
SN74LVTH273DBR-SN74LVTH273DW-SN74LVTH273DWR-SN74LVTH273DWRE4-SN74LVTH273PW Fast Delivery,Good Price
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Partno Mfg Dc Qty AvailableDescript
SN74LVTH273DBRTIN/a11848avai3.3-V ABT Octal D-Type Flip-Flops With Clear
SN74LVTH273DWTIN/a210avai3.3-V ABT Octal D-Type Flip-Flops With Clear
SN74LVTH273DWRTIN/a2000avai3.3-V ABT Octal D-Type Flip-Flops With Clear
SN74LVTH273DWRE4TIN/a1370avai3.3-V ABT Octal D-Type Flip-Flops With Clear 20-SOIC -40 to 85
SN74LVTH273PWTIN/a5639avai3.3-V ABT Octal D-Type Flip-Flops With Clear
SN74LVTH273PWG4TI/BBN/a20avai3.3-V ABT Octal D-Type Flip-Flops With Clear 20-TSSOP -40 to 85
SN74LVTH273PWRTIN/a32000avai3.3-V ABT Octal D-Type Flip-Flops With Clear


SN74LVTH273PWR ,3.3-V ABT Octal D-Type Flip-Flops With Clearmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
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SN74LVTH373NSR ,3.3-V ABT Octal Transparent D-Type Latches With 3-State Outputs         SCBS689H − MAY 1997 ..
SN74LVTH373PW ,3.3-V ABT Octal Transparent D-Type Latches With 3-State Outputs/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
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SN74LVTH273DBR-SN74LVTH273DW-SN74LVTH273DWR-SN74LVTH273DWRE4-SN74LVTH273PW-SN74LVTH273PWG4-SN74LVTH273PWR
3.3-V ABT Octal D-Type Flip-Flops With Clear
Support Unregulated Battery OperationDown To 2.7 V Buffered Clock and Direct-Clear Inputs Individual Data Input to Each Flip-Flop Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
SN54LVTH273 ...J PACKAGE
SN74LVTH273... DB, DW, NS, OR PW PACKAGE
(TOP VIEW)
SN54LVTH273... FK PACKAGE
(TOP VIEW)
1QCLR
GND
CLK
CLR
GND
VCC
CLK
description/ordering information

These octal D-type flip-flops are designed specifically for low-voltage (3.3-V) VCC operation, but with the
capability to provide a TTL interface to a 5-V system environment.
The ’LVTH273 devices are positive-edge-triggered flip-flops with a direct-clear input. Information at the data (D)
inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going
edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the
transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the
D-input signal has no effect at the output.
ORDERING INFORMATION

†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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