SN74LVTH126D ,3.3-V ABT Quadruple Bus Buffers With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74LVTH126DBR ,3.3-V ABT Quadruple Bus Buffers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74LVTH126PW ,3.3-V ABT Quadruple Bus Buffers With 3-State Outputs SCBS746B − JULY 2000 - REVI ..
SN74LVTH162240DGGR ,3.3-V ABT 16-Bit Buffers/Drivers With 3-State OutputsSCBS685F–MARCH 1997–REVISED NOVEMBER 2006(1)LOGIC SYMBOL11OE EN1482OE EN2253OEEN324EN44OE47 21A1 1 ..
SN74LVTH162240DL ,3.3-V ABT 16-Bit Buffers/Drivers With 3-State OutputsMaximum Ratingsover operating free-air temperature range (unless otherwise noted)MIN MAX UNITV Supp ..
SN74LVTH162240DLR ,3.3-V ABT 16-Bit Buffers/Drivers With 3-State OutputsSCBS685F–MARCH 1997–REVISED NOVEMBER 2006DESCRIPTION/ORDERING INFORMATION (CONTINUED)Active bus-hol ..
SP708CU , Low Power Microprocessor Supervisory Circuits
SP708CU , Low Power Microprocessor Supervisory Circuits
SP708EU , Low Power Microprocessor Supervisory Circuits
SP708EU , Low Power Microprocessor Supervisory Circuits
SP708EU , Low Power Microprocessor Supervisory Circuits
SP708REN , 3.0V/3.3V Low Power Microprocessor Supervisory Circuits
SN74LVTH126D-SN74LVTH126DBR-SN74LVTH126PW
3.3-V ABT Quadruple Bus Buffers With 3-State Outputs
<0.8 V at VCC = 3.3 V, TA = 25°CIoff and Power-Up 3-State Support Hot
Insertion Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering informationThese bus buffers are designed specifically for
low-voltage (3.3-V) VCC operation, but with the
capability to provide a TTL interface to a 5-V
system environment.
The ’LVTH126 devices feature independent line
drivers with 3-state outputs. Each output is in the
high-impedance state when the associated
output-enable (OE) input is low.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2OE
GND
3OE
3OE
2OE1OENC3A4OE
GND
NC − No internal connection
SN54LVTH126... FK PACKAGE
(TOP VIEW)
