SN74LVT240APWR ,3.3-V ABT Octal Buffers/Drivers With 3-State Outputs/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74LVT244A , 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVT244B ,3.3-V ABT Octal Buffers/Drivers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74LVT244BDB ,3.3-V ABT Octal Buffers/Drivers With 3-State OutputsSN74LVT244B3.3-V ABT OCTAL BUFFER/DRIVERWITH 3-STATE OUTPUTSSCAS354J − FEBRUARY 1994 − REVISED SEPT ..
SN74LVT244BDBR ,3.3-V ABT Octal Buffers/Drivers With 3-State OutputsSN74LVT244B3.3-V ABT OCTAL BUFFER/DRIVERWITH 3-STATE OUTPUTSSCAS354J − FEBRUARY 1994 − REVISED SEPT ..
SN74LVT244BDBR ,3.3-V ABT Octal Buffers/Drivers With 3-State Outputs/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SP706CP , Low Power Microprocessor Supervisory Circuits
SP706CP , Low Power Microprocessor Supervisory Circuits
SP706CP , Low Power Microprocessor Supervisory Circuits
SP706PCN , 3.0V/3.3V Low Power Microprocessor Supervisory Circuits
SP706PEN , 3.0V/3.3V Low Power Microprocessor Supervisory Circuits
SP706PEN , 3.0V/3.3V Low Power Microprocessor Supervisory Circuits
SN74LVT240ADBR-SN74LVT240ADW-SN74LVT240APW-SN74LVT240APWR
3.3-V ABT Octal Buffers/Drivers With 3-State Outputs
Typical VOLP (Output Ground Bounce)<0.8 V at VCC = 3.3 V, TA = 25°CIoff and Power-Up 3-State Support Hot
Insertion Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering informationThis octal buffer and line driver is designed specifically for low-voltage (3.3-V) VCC operation, but with the
capability to provide a TTL interface to a 5-V system environment.
The SN74LVT240A is organized as two 4-bit buffer/line drivers with separate output-enable (OE) inputs. When
OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the device when it is powered down. The
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
