SN74LVC2G86DCTR ,Dual 2-Input Exclusive-Or GateThese devices have limited built-in ESD protection. The leads should be shorted together or the dev ..
SN74LVC2G86DCTR ,Dual 2-Input Exclusive-Or Gate SCES360I–AUGUST 2001–REVISED DECEMBER 2013Dual 2-Input Exclusive-OR GateCheck for Samples: SN74LVC ..
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SN74LVC2G86DCTR-SN74LVC2G86DCUR-SN74LVC2G86DCURG4
Dual 2-Input Exclusive-Or Gate
311A VCCGND
DCT PACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOM VIEW)
DCU PACKAGE
(TOP VIEW) 51A VCC1B
GND
VCC 2B4 6
SN74LVC2G86
www.ti.com SCES360I –AUGUST 2001–REVISED DECEMBER 2013
Dual 2-Input Exclusive-OR Gate
Checkfor Samples: SN74LVC2G86
1FEATURES DESCRIPTIONThis dual 2-input exclusive-OR gateis designed for
Availablein the Texas Instruments NanoFree™ 1.65-Vto 5.5-V VCC operation.
PackageThe SN74LVC2G86 performs the Boolean functionY
• Supports 5-V VCC Operation =A⊕BorY= AB+ ABin positive logic.
• Inputs Accept Voltagesto 5.5VNanoFree™ package technology is a major
• Max tpdof 4.7 nsat 3.3V breakthroughinIC packaging concepts, using the die
• Low Power Consumption, 10-μA Max ICC as the package.
• ±24-mA Output Driveat 3.3V A common application is asa true/complement
• Typical VOLP (Output Ground Bounce) element.If the input is low, the other input is
<0.8Vat VCC= 3.3V,TA= 25°C reproducedin true format the output.If the inputis
Typical VOHV (Output VOH Undershoot) high, the signal on the other inputis reproduced
invertedat the output.
>2Vat VCC= 3.3V,TA= 25°C Ioff Supports Live Insertion, Partial-Power- This deviceis fully specified for partial-power-down
Down Mode and Back Drive Protection applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow
• Latch-Up Performance Exceeds 100 mA Per through the device whenitis powered down.
JESD 78, ClassII ESD Protection Exceeds JESD22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
