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SN74LVC2G79DCUR-SN74LVC2G79YZPR
Dual Positive-Edge-Triggered D-Type Flip-Flop
DCT PACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOM VIEW) VCC81CLK 71D 1Q 6 2D 2CLKGND 4 2CLK
GND 54 2CLK6 2D2Q7 1Q1D VCC11CLK
SN74LVC2G79
1FEATURES DESCRIPTIONThis dual positive-edge-triggered D-type flip-flopis
Availablein the Texas Instruments NanoFree™ designed for 1.65-Vto 5.5-V VCC operation.
PackageWhen dataat the data (D) input meets the setup time
• Supports 5-V VCC Operation requirement, the datais transferredto theQ output
• Inputs Accept Voltagesto 5.5V on the positive-going edgeof the clock pulse. Clock
• Max tpdof 4.2 nsat 3.3V triggering occursata voltage level andis not directly
relatedto the rise timeof the clock pulse. Following
• Low Power Consumption, 10-μA Max ICCthe hold-time interval, dataat theD input can be
• ±24-mA Output Driveat 3.3V the levelsat the outputs.
• Typical VOLP (Output Ground Bounce) technology is a major
<0.8Vat VCC= 3.3V,TA= 25°C concepts, using the die
• Typical VOHV (Output VOH Undershoot)>2Vat VCC= 3.3V,TA= 25°C for partial-power-down
• Ioff Feature Supports Live Insertion, Partial- Ioff circuitry disables the
Power-Down Mode Operation and Back Drive outputs, preventing damaging current backflow
Protection through the device whenitis powered down.
Latch-Up Performance Exceeds 100 mA Per
JESD 78, ClassII ESD Protection Exceeds JESD22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
