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Home ›  SS74 > 74LVC2G125DCTRE4-74LVC2G125DCTRE6-74LVC2G125DCURE4-SN74LVC2G125DCTR-SN74LVC2G125DCUR-SN74LVC2G125YZPR,Dual Bus Buffer Gate with 3-State Outputs
74LVC2G125DCTRE4-74LVC2G125DCTRE6-74LVC2G125DCURE4-SN74LVC2G125DCTR-SN74LVC2G125DCUR Fast Delivery,Good Price
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74LVC2G125DCTRE4TIN/a25avaiDual Bus Buffer Gate with 3-State Outputs 8-SM8 -40 to 125
74LVC2G125DCTRE6TIN/a3359avaiDual Bus Buffer Gate with 3-State Outputs 8-SM8 -40 to 125
74LVC2G125DCTRE6TEXASN/a3000avaiDual Bus Buffer Gate with 3-State Outputs 8-SM8 -40 to 125
74LVC2G125DCURE4TIN/a4032avaiDual Bus Buffer Gate with 3-State Outputs 8-VSSOP -40 to 125
SN74LVC2G125DCTRTIN/a25800avaiDual Bus Buffer Gate with 3-State Outputs
SN74LVC2G125DCURWUN/a8avaiDual Bus Buffer Gate with 3-State Outputs
SN74LVC2G125YZPRTIN/a3000avaiDual Bus Buffer Gate with 3-State Outputs


SN74LVC2G125DCTR ,Dual Bus Buffer Gate with 3-State Outputsfeatures dual line drivers with 3-state– 1000-V Charged-Device Modeloutputs. The outputs are disabl ..
SN74LVC2G125DCUR ,Dual Bus Buffer Gate with 3-State OutputsMaximum Ratings . 511 Layout.... 136.2 ESD Ratings........ 511.1 Layout Guidelines.... 136.3 Recomm ..
SN74LVC2G125YZPR ,Dual Bus Buffer Gate with 3-State OutputsSupport &Product Order Tools &TechnicalCommunityFolder Now Documents SoftwareSN74LVC2G125SCES204Q–A ..
SN74LVC2G126DCTR ,Dual Bus Buffer Gate With 3-State OutputsFeatures 2 Applications1• Available in the Texas Instruments NanoFree™ • Cable Modem Termination Sy ..
SN74LVC2G126DCTR ,Dual Bus Buffer Gate With 3-State OutputsMaximum Ratings.... 4J• Added Receiving Notification of Documentation Updates section and Community ..
SN74LVC2G126DCUR ,Dual Bus Buffer Gate With 3-State OutputsSample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareSN74LVC2G126SCES205M ..
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74LVC2G125DCTRE4-74LVC2G125DCTRE6-74LVC2G125DCURE4-SN74LVC2G125DCTR-SN74LVC2G125DCUR-SN74LVC2G125YZPR
Dual Bus Buffer Gate with 3-State Outputs 8-SM8 -40 to 125
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SN74LVC2G125

SCES204Q –APRIL 1999–REVISED MARCH 2017
SN74LVC2G125 Dual Bus Buffer Gate With 3-State Outputs Features
ESD Protection Exceeds JESD22 2000-V Human-Body Model 1000-V Charged-Device Model Availablein the Texas Instruments
NanoFree™ Package Supports 5-V VCC Operation Inputs Accept Voltagesto 5.5V Maxtpdof 4.3nsat 3.3V Low Power Consumption, 10-µA Max ICC ±24-mA Output Driveat 3.3V Typical VOLP (Output Ground Bounce) 0.8Vat VCC= 3.3V,TA= 25°C Typical VOHV (Output VOH Undershoot)2Vat VCC= 3.3V,TA= 25°C Ioff Supports Live Insertion, Partial-Power-Down
Mode, and Back-Drive Protection Can Be Usedasa Down Translatorto Translate
Inputs Froma Maxof 5.5V Down the VCC Level Latch-Up Performance Exceeds 100 mA Per
JESD 78, ClassII Applications Cable Modem Termination Systems High-Speed Data Acquisition and Generation Military: Radars and Sonars Motor Controls: High-Voltage Power Line Communication Modems SSDs: Internalor External Video Broadcasting and Infrastructure: Scalable
Platforms Video Broadcasting: IP-Based Multi-Format
Transcoders Systems Description
The SN74LVC2G125 deviceisa dual bus buffer
gate, designed for 1.65-V to 5.5-V VCC operation.
This device features dual line drivers with 3-state
outputs. The outputs are disabled when the
associated output-enable (OE) inputis high.
NanoFree™ package technology is a major
breakthroughinIC packaging concepts, using the die the package. ensure the high-impedance state during power up power down, OE should be tiedto VCC througha
pullup resistor; the minimum valueof the resistoris
determined by the current-sinking capability of the
driver.
This deviceis fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow
through the device whenitis powered down.
Device Information(1)

(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Simplified Schematic
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