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SN74LVC2G00DCTRN/a5771avaiDual 2-Input Positive-NAND Gate
SN74LVC2G00DCURTIN/a160000avaiDual 2-Input Positive-NAND Gate
SN74LVC2G00YZPRTIN/a53377avaiDual 2-Input Positive-NAND Gate


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SN74LVC2G00YZPR ,Dual 2-Input Positive-NAND GateBlock Diagram..... 93 Description....... 19.3 Feature Description...... 94 Simplified Schematic 19. ..
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SN74LVC2G00DCTR-SN74LVC2G00DCUR-SN74LVC2G00YZPR
Dual 2-Input Positive-NAND Gate
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SN74LVC2G00

SCES193N –APRIL 1999–REVISED JANUARY 2015
SN74LVC2G00 Dual 2-Input Positive-NAND Gate Features 3 Description

This dual 2-input positive-NAND gateis designed for Availablein the Texas Instruments 1.65-Vto 5.5-V VCC operation.NanoFree™ Package
The SN74LVC2G00 device performs the Boolean• Supports 5-V VCC Operation
functionY=A×BorY=A+Bin positive logic.• Inputs Accept Voltagesto 5.5V
NanoFree™ package technology is a major• Maxtpdof 4.3nsat 3.3V breakthroughinIC packaging concepts, using the die• Low Power Consumption, 10-μA Max ICC as the package.• ±24-mA Output Driveat 3.3V This deviceis fully specified for partial-power-down• Typical VOLP (Output Ground Bounce) applications using Ioff. The Ioff circuitry disables the< 0.8Vat VCC= 3.3V,TA= 25°C outputs, preventing damaging current backflow• Typical VOHV (Output VOH Undershoot) through the device whenitis powered down.2Vat VCC= 3.3V,TA= 25°C
Device Information(1)
• Ioff Supports Live Insertion, Partial PowerDown Mode, and Back Drive Protection• Latch-Up Performance Exceeds 100 mAPer JESD 78, ClassII• ESD Protection Exceeds JESD22
(1) Forall available packages, see the orderable addendumat– 2000-V Human-Body Model
the endofthe data sheet.– 1000-V Charged-Device Model Simplified Schematic2 Applications IP Phones: Wired and Wireless Optical Modules Optical Networking: EPON and Video Over Fiber Point-to-Point Microwave Backhaul Power: Telecom DC/DC Module:
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