SN54LS163AJ ,BCD decade counter/4-bit binary counterSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN54LS163J ,BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERSSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN54LS164 ,SERIAL-IN PARALLEL-OUT SHIFT REGISTER”SN54164, sit5iu.s1isiii7ii1tiii," SN74LS1648-BIT PARALLEl-OUT SERIAL SHIFT REGISTERSMARCH 1974 - R ..
SN54LS164J ,SERIAL-IN PARALLEL-OUT SHIFT REGISTERSN54/74LS164SERIAL-IN PARALLEL-OUTSHIFT REGISTERThe SN54/ 74LS164 is a high speed 8-Bit Serial-In P ..
SN54LS165AJ ,Parallel-Load 8-Bit Shift RegistersSN54165, SN54LS165A, SN74165, SN74LS165A PARALLEL-LOAD 8-BIT SHIFT REGISTERSThe SN54165 and SN74165 ..
SN54LS165J ,8-BIT PARALLEL-TO-SERIAL SHIFT REGISTERSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN74HC00 ,Quad 2-Input Positive-NAND GatesMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITSup ..
SN74HC00A , QUADRUPLE 2 - INPUT POSITIVE - NAND GATES
SN74HC00D ,Quad 2-Input Positive-NAND GatesElectrical Characteristics....... 512.3 Receiving Notification of Documentation Updates 116.6 Switc ..
SN74HC00DBR ,Quad 2-Input Positive-NAND Gates 14-SSOP -40 to 85Logic Diagram (Positive Logic)• Power: Telecom or Server AC/DC SupplyA(Single Controller: Analog an ..
SN74HC00DG4 ,Quad 2-Input Positive-NAND Gates 14-SOIC -40 to 85Electrical Characteristics....... 512.3 Receiving Notification of Documentation Updates 116.6 Switc ..
SN74HC00DR ,Quad 2-Input Positive-NAND GatesMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITSup ..
SN54LS160AJ-SN54LS161AJ-SN54LS162AJ-SN54LS163AJ-SN74LS160AN-SN74LS161AN-SN74LS161AN..-SN74LS162AN-SN74LS163AN
BCD decade counter/4-bit binary counter
BCD DECADE COUNTERS/
4-BIT BINARY COUNTERSThe LS160A/161A/162A/163A are high-speed 4-bit synchronous count-
ers. They are edge-triggered, synchronously presettable, and cascadable
MSI building blocks for counting, memory addressing, frequency division and
other applications. The LS160A and LS162A count modulo 10 (BCD). The
LS161A and LS163A count modulo 16 (binary.)
The LS160A and LS161A have an asynchronous Master Reset (Clear)
input that overrides, and is independent of, the clock and all other control
inputs. The LS162A and LS163A have a Synchronous Reset (Clear) input that
overrides all other control inputs, but is active only during the rising clock
edge. Synchronous Counting and Loading Two Count Enable Inputs for High Speed Synchronous Expansion Terminal Count Fully Decoded Edge-Triggered Operation Typical Count Rate of 35 MHz ESD > 3500 Volts
CONNECTION DIAGRAM DIP (TOP VIEW)NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.--- -- -- --- --- -- -- -- --
*MR for LS160A and LS161A
*SR for LS162A and LS163A
PIN NAMES LOADING (Note a)P0–P3
CEP
CET
Q0–Q3
Parallel Enable (Active LOW) Input
Parallel Inputs
Count Enable Parallel Input
Count Enable Trickle Input
Clock (Active HIGH Going Edge) Input
Master Reset (Active LOW) Input
Synchronous Reset (Active LOW) Input
Parallel Outputs (Note b)
Terminal Count Output (Note b)
NOTES: 1 TTL Unit Load (U.L.) = 40 μA HIGH/1.6 mA LOW. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
Temperature Ranges.
