SN74HC74QPWRQ1 ,Dual D-Type Positive-Edge-Triggered Flip-Flops With Clear and Presetmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74HC86D ,Quadruple 2-Input Exclusive-OR Gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74HC86DR ,Quadruple 2-Input Exclusive-OR GatesSN54HC86, SN74HC86QUADRUPLE 2-INPUT EXCLUSIVE-OR GATESSCLS100E – DECEMBER 1982 – REVISED AUGUST 200 ..
SN74HC86DRG4 ,Quadruple 2-Input Exclusive-OR Gates 14-SOIC -40 to 85maximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74HC86N ,Quadruple 2-Input Exclusive-OR GatesSN54HC86, SN74HC86QUADRUPLE 2-INPUT EXCLUSIVE-OR GATESSCLS100E – DECEMBER 1982 – REVISED AUGUST 200 ..
SN74HC86NSR ,Quadruple 2-Input Exclusive-OR GatesSN54HC86, SN74HC86QUADRUPLE 2-INPUT EXCLUSIVE-OR GATESSCLS100E – DECEMBER 1982 – REVISED AUGUST 200 ..
SNA-176 , DC-10 GHZ CASCADABLE GAAS MMIC AMPLIFIER
SNA-386 , DC 3 GHZ CASCADABLE GAAS MMIC AMPLIFIER
SNA-586 , DC-5 GHz, Cascadable GaAs HBT MMIC Amplifier
SNA-586 , DC-5 GHz, Cascadable GaAs HBT MMIC Amplifier
SNA-586 , DC-5 GHz, Cascadable GaAs HBT MMIC Amplifier
SNA-686 , DC 6 GHZ CASCADABLE GAAS HBT MMIC AMPLIFIER
SN74HC74QPWRG4Q1-SN74HC74QPWRQ1
Automotive Catalog Dual D-Type Positive-Edge-Triggered Flip-Flops With Clear and Preset
Typical tpd = 15 ns ±4-mA Output Drive at 5 V
Low Input Current of 1 µA Maxdescription/ordering informationThe SN74HC74 device contains two independent D-type positive-edge-triggered flip-flops. A low level at the
preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When
PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements are transferred
to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and
is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed
without affecting the levels at the outputs.
ORDERING INFORMATION� For the most current package and ordering information, see the Package Option Addendum at the end of
this document, or see the TI web site at http://www.ti.com. Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
FUNCTION TABLE This configuration is nonstable; that is, it does not
persist when PRE or CLR returns to its inactive
(high) level.
1CLK
1PRE
GND
2CLK
2PRE
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
