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SN74HC377-SN74HC377DW-SN74HC377DWR-SN74HC377N-SN74HC377NSR Fast Delivery,Good Price
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Partno Mfg Dc Qty AvailableDescript
SN74HC377TIN/a40avaiOctal D-Type Flip-Flops With Clock Enable
SN74HC377DWTIN/a396avaiOctal D-Type Flip-Flops With Clock Enable
SN74HC377DWRTIN/a1990avaiOctal D-Type Flip-Flops With Clock Enable
SN74HC377NTIN/a1000avaiOctal D-Type Flip-Flops With Clock Enable
SN74HC377NSRTI ?N/a23625avaiOctal D-Type Flip-Flops With Clock Enable


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SN74HC377-SN74HC377DW-SN74HC377DWR-SN74HC377N-SN74HC377NSR
Octal D-Type Flip-Flops With Clock Enable 20-SOIC -40 to 85
±4-mA Output Drive at 5 V Low Input Current of 1 μA Max Eight Flip-Flops With Single-Rail Outputs Clock Enable Latched to Avoid FalseClocking Applications Include:
– Buffer/Storage Registers
– Shift Registers
– Pattern Generators
description/ordering information

These devices are positive-edge-triggered octal
D-type flip-flops with an enable input. The ’HC377
devices are similar to the ’HC273 devices, but
feature a latched clock-enable (CLKEN) input
instead of a common clear.
Information at the data (D) inputs meeting the
setup time requirements is transferred to the
Q outputs on the positive-going edge of the clock
(CLK) pulse, if CLKEN is low. Clock triggering
occurs at a particular voltage level and is not
directly related to the transition time of the
positive-going pulse. When CLK is at either the
high or low level, the D input has no effect at the
output. These devices are designed to prevent
false clocking by transitions at CLKEN.
ORDERING INFORMATION

†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.1QCLKEN8Q
GND
CLK
SN54HC377... FK PACKAGE
(TOP VIEW)

GND
CLK
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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