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SN74GTL16622ADGGR
18-Bit LVTTL To GTL/GTL+ Bus Transceiver
FEATURES
DESCRIPTION/ORDERING INFORMATION
DGG PACKAGE
(TOP VIEW)OEAB
1A1
GND
1A3
GND
VCC
1A4
GND
1A5
1A6
GND
1A7
1A8
GND
1A9
2A1
GND
2A2
2A3
GND
2A4
2A5
GND
2A6
VCC
GND
2A7
2A8
GND
2A9
OEBA
CLKAB
1CEAB
1CEBA
1B1
GND
1B2
1B3
VCC
1B4
1B5
1B6
GND
1B7
1B8
GND
1B9
2B1
GND
2B2
2B3
GND
2B4
2B5
2B6
VREF
2B7
2B8
GND
2B9
2CEBA
2CEAB
CLKBA
The user has theof using this deviceat either GTL (VTT= 1.2V and VREF= 0.8V)or the preferred
SN74GTL16622A
18-BIT LVTTL-TO-GTL/GTL+ BUS TRANSCEIVER Memberof Texas Instruments Widebus™
Family OEC™ Circuitry Improves Signal Integrity and
Reduces Electromagnetic Interference D-Type Flip-Flops With Qualified Storage
Enable Translates Between GTL/GTL+ Signal Levels
and LVTTL Logic Levels Supports Mixed-Mode (3.3V and5V) Signal
Operation on and Control Inputs Ioff Supports Mode
Operation Bus Hold on Inputs Eliminates the Need
for External Resistors on Port Distributed and GND Pins Minimize
High-Speed Latch-Up Performance Exceeds 250 mA Per
JESD17 ESD Protection Exceeds JESD22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)The SN74GTL16622Ais an 18-bit registered bus
transceiver that LVTTL-to-GTL/GTL+ and
GTL/GTL+-to-LVTTL signal-level translation. This
device is partitioned as two separate 9-bit
transceivers with clock-enable controls and
contains D-type for temporary storageof
data flowingin either direction. This device provides interface between cards operatingat LVTTL logic
levels anda backplane operatingat GTL/GTL+ signal
levels. Higher-speed operationisa direct resultof the
reduced output swing (<1 V), reduced input threshold
levels, and OEC™ noise margin GTL+ (VTT= 1.5V and VREF=1V) signal levels. GTL+is the Texas Instruments derivative Gunning Transceiver Logic (GTL) JEDEC standard 8-3. TheB port normally operatesat GTLor levels, while the A-port and control inputs are with LVTTL logic levels and are 5-Vis input voltagefor theB port. each controlledby the output-enable and OEBA) and clock (CLKAB and CLKBA) The clock-enable each 9-bit transceiver independently, which makes the
device more versatile.
