SN74F573DWR ,Octal Transparent D-Type Latches With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F573N ,Octal Transparent D-Type Latches With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
SN74F574DW ,Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs SN74F574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SDFS005A – D3034, SEPTEMBER 19 ..
SN74F574DWR ,Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputslogic diagram (positive logic)11OE ENOE11CLK C111CLK2 191D 1D 1Q3 18C12D 2Q191Q4 1721D3D 3Q 1D5 164 ..
SN74F574N ,Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74F574NSR ,Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputsfeatures 3-state outputsGND 10 11 CLKdesigned specifically for driving highly capacitiveor relative ..
SN75182N ,Dual Differential Line Receiverlogic diagram (positive logic)31IN+611IN– 1OUT21RT51RTC41STRB112IN+8132IN– 2OUT122RT92RTC102STRBPin ..
SN75182NSR ,Dual Differential Line Receiverlogic diagram (positive logic)31IN+611IN– 1OUT21RT51RTC41STRB112IN+8132IN– 2OUT122RT92RTC102STRBPin ..
SN75183 ,Quadruple Differential Line Driver DS8830, SN55183, SN75183 DUAL DIFFERENTIAL LINE DRIVERS SLLS093D – OCTOBER 1972 – REVISED APRIL 19 ..
SN75183N ,Quadruple Differential Line Drivermaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SN75183NSR ,Quadruple Differential Line Drivermaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SN75185 ,Multiple RS-232 Drivers And ReceiversSLLS181D–DECEMBER 1994–REVISED JANUARY 2006SCHEMATIC OF DRIVERSTo Other DriversVESDDD11.6 kΩ 9.4 kΩ ..
SN74F573DW-SN74F573DWR-SN74F573N
Octal Transparent D-Type Latches With 3-State Outputs
Package Options Include PlasticSmall-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
descriptionThese 8-bit latches feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The eight latches of the ′F573 are transparent
D-type latches. While the latch enable (LE) input
is high, the Q outputs follow the data (D) inputs.
When the latch enable is taken low, the Q outputs
are latched at the logic levels set up at the D
inputs.
A buffered output enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or a high-
impedance state. In the high-impedance state, the
outputs neither load nor drive the bus lines
significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without need for interface or pullup
components.
The output enable (OE) input does not affect the internal operations of the latches. Old data can be retained
or new data can be entered while the outputs are in the high-impedance state.
The SN54F573 is characterized for operation over the full military temperature range of −55°C to 125°C. The
SN74F573 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each latch)
