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SN74AUCH244RGYRTEXASN/a2000avaiOctal Buffer/Driver with 3-State Outputs
SN74AUCH244RGYRTIN/a45avaiOctal Buffer/Driver with 3-State Outputs


SN74AUCH244RGYR ,Octal Buffer/Driver with 3-State Outputs          SCES433 − MARCH 2003RGY PACKAGE Optimized for 1.8-V ..
SN74AUCH244RGYR ,Octal Buffer/Driver with 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
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SN74LVT16240DGGR ,3.3-V ABT 16-Bit Buffers/Drivers With 3-State OutputsSCBS717A–APRIL 2000–REVISED NOVEMBER 2006DESCRIPTION/ORDERING INFORMATION (CONTINUED)The SN54LVT162 ..
SN74LVT16240DL ,3.3-V ABT 16-Bit Buffers/Drivers With 3-State Outputsmaximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functi ..
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SN74LVT16244 , 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS


SN74AUCH244RGYR
Octal Buffer/Driver with 3-State Outputs
Sub 1-V Operable Max tpd of 1.9 ns at 1.8 V Low Power Consumption, 20-µA Max ICC ±8-mA Output Drive at 1.8 V Bus Hold on Data Inputs Eliminates theNeed for External Pullup/Pulldown
Resistors
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering information

This octal buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC
operation.
The SN74AUCH244 is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE
is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
2A1
GND
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