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SN74AUC32245ZKER
32-Bit Bus Transceiver With 3-State Outputs
www.ti.com
FEATURES
DESCRIPTION/ORDERING INFORMATION
SN74AUC32245
32-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTSSCES410C–AUGUST 2002–REVISED MARCH 2005
Max tpdof2nsat 1.8V Memberof the Texas Instruments Widebus+™ •
Low Power Consumption, 40-μA Max ICC
Family • ±8-mA
Output Driveat 1.8V Optimized for 1.8-V Operation andIs 3.6-V I/O •
Latch-Up Performance Exceeds 100 mA PerTolerantto Support Mixed-Mode Signal JESD 78, ClassIIOperation •
ESD Protection Exceeds JESD22•
Ioff Supports Partial-Power-Down Mode – 2000-V Human-Body Model (A114-A)Operation – 200-V Machine Model (A115-A)•
Sub-1-V Operable – 1000-V Charged-Device Model (C101)This 32-bit noninverting bus transceiveris operationalat 0.8-Vto 2.7-VVCC, butis designed specifically for
1.65-Vto 1.95-VVCC operation.
The SN74AUC32245is designed for asynchronous communication between data buses. The control-function
implementation minimizes external timing requirements.
This device can be usedas four 8-bit transceivers, two 16-bit transceivers,or one 32-bit transceiver.It allows
data transmission from theA busto theB busor from theB busto theA bus, dependingon the logic levelat the
direction-control (DIR) input. The output-enable (OE) input can be usedto disable the device so that the buses
are effectively isolated. ensure the high-impedance state during power upor power down, OE should be tiedtoVCC througha pullup
preventing damaging current backflow through the device whenitis powered down.
ORDERING INFORMATION PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING–40°Cto 85°C LFBGA– GKE Tape and reel SN74AUC32245GKER MM245
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelinesare availableat
www.ti.com/sc/package.
