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Home ›  SS60 > SN74AUC1G08DBVR-SN74AUC1G08DCKR-SN74AUC1G08DCKRG4-SN74AUC1G08DRLRG4-SN74AUC1G08YZPR,Single 2-Input Positive-AND Gate 5-SOT -40 to 85
SN74AUC1G08DBVR-SN74AUC1G08DCKR-SN74AUC1G08DCKRG4-SN74AUC1G08DRLRG4-SN74AUC1G08YZPR Fast Delivery,Good Price
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SN74AUC1G08DBVRTI N/a1avaiSingle 2-Input Positive-AND Gate
SN74AUC1G08DCKRTEXASN/a3000avaiSingle 2-Input Positive-AND Gate
SN74AUC1G08DCKRG4TIN/a4509avaiSingle 2-Input Positive-AND Gate 5-SC70 -40 to 85
SN74AUC1G08DRLRG4TIN/a44000avaiSingle 2-Input Positive-AND Gate 5-SOT -40 to 85
SN74AUC1G08YZPRTIN/a15000avaiSingle 2-Input Positive-AND Gate


SN74AUC1G08DRLRG4 ,Single 2-Input Positive-AND Gate 5-SOT -40 to 85Maximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITV S ..
SN74AUC1G08YZPR ,Single 2-Input Positive-AND GateMaximum Ratings.. 39.2 Receiving Notification of Documentation Updates.... 86.2 ESD Ratings........ ..
SN74AUC1G125DBVR ,Single Bus Buffer Gate With 3-State OutputElectrical Characteristics....... 59.6 Glossary..... 96.6 Switching Characteristics: C = 15 pF.... ..
SN74AUC1G125DCKR ,Single Bus Buffer Gate With 3-State OutputFeatures 3 DescriptionThis bus buffer gate is operational at 0.8-V to 2.7-V1• Latch-Up Performance ..
SN74AUC1G125YZPR ,Single Bus Buffer Gate With 3-State Output SCES382L–MARCH 2002–REVISED JUNE 20175 Pin Configuration and FunctionsDBV PackageDCK Package5-Pin ..
SN74AUC1G126DBVR ,Single Bus Buffer Gate With 3-State OutputFeatures 3 DescriptionThe SN74AUC1G126 bus buffer gate is operational1• Latch-Up Performance Exceed ..
SN74LVCH32245AZKER ,32-Bit Bus Transceiver With 3-State OutputSCAS616H–OCTOBER 1998–REVISED MARCH 2005GKE OR ZKE PACKAGETERMINAL ASSIGNMENTS(TOP VIEW)1 2 3 4 5 6 ..
SN74LVCH32373AGKER ,32-Bit Transparent D-Type Latch With 3-State OutputsFEATURES • Supports Mixed-Mode Signal Operation(5-V Input and Output Voltages With• Member of the T ..
SN74LVCH32373AGKER ,32-Bit Transparent D-Type Latch With 3-State OutputsSCAS618D–OCTOBER 1998–REVISED MARCH 2005GKE PACKAGETERMINAL ASSIGNMENTS(TOP VIEW)1 2 3 4 5 61 2 3 4 ..
SN74LVCH32373AZKER ,32-Bit Transparent D-Type Latch With 3-State Outputsmaximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functi ..
SN74LVCHR16245A ,16-Bit Bus Transceiver With 3-State OutputsElectrical Characteristics....... 813.1 Trademarks..... 167.6 Switching Characteristics...... 913.2 ..
SN74LVCHR16245AGR ,16-Bit Bus Transceiver With 3-State OutputsMaximum Ratings . 612 Layout.... 157.2 Handling Ratings. 612.1 Layout Guidelines.... 157.3 Recommen ..


SN74AUC1G08DBVR-SN74AUC1G08DCKR-SN74AUC1G08DCKRG4-SN74AUC1G08DRLRG4-SN74AUC1G08YZPR
Single 2-Input Positive-AND Gate
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SN74AUC1G08

SCES374P–SEPTEMBER 2001–REVISED JUNE 2017
SN74AUC1G08 Single 2-Input Positive-AND Gate Features
Latch-Up Performance Exceeds 100 mA Per
JESD 78, ClassII ESD Protection Exceeds JESD22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101) Availablein the Texas Instruments NanoFree™
Package Optimized for 1.8-V Operation andIs 3.6-V I/O
Tolerantto Support Mixed-Mode Signal Operation Ioff Supports Partial-Power-Down Mode and Back
Drive Protection Sub-1-V Operable Maxtpdof 2.4nsat 1.8V Low Power Consumption, 10-µA Max ICC ±8-mA Output Driveat 1.8V Applications AV Receiver Audio Dock: Portable Blu-Ray Player and Home Theater Embedded PC MP3 Player/Recorder (Portable Audio) Personal Digital Assistant (PDA) Power: Telecom/Server AC/DC Supply: Single
Controller: Analog and Digital Solid State Drive (SSD): Client and Enterprise TV: LCD/Digital and High-Definition (HDTV) Tablet: Enterprise Video Analytics: Server Wireless Headset, Keyboard, and Mouse Description
This single 2-input positive-AND gateis operationalat
0.8-Vto 2.7-V VCC, butis designed specifically for
1.65-Vto 1.95-V VCC operation.
The SN74AUC1G08 device performs the Boolean
function in positive logic.
NanoFree™ package technology is a major
breakthroughinIC packaging concepts, using the die the package.
This deviceis fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow
through the device whenitis powered down.
Device Information(1)

(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Logic Diagram (Positive Logic)
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