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SN74AUC1G04DBVR-SN74AUC1G04DBVRG4-SN74AUC1G04DCKR-SN74AUC1G04DRLR-SN74AUC1G04YZPR Fast Delivery,Good Price
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SN74AUC1G04DBVRTIN/a28000avaiSingle Inverter Gate
SN74AUC1G04DBVRG4TIN/a15005avaiSingle Inverter Gate 5-SOT-23 -40 to 85
SN74AUC1G04DCKRTIN/a43500avaiSingle Inverter Gate
SN74AUC1G04DRLRTIN/a3856avaiSingle Inverter Gate 5-SOT -40 to 85
SN74AUC1G04YZPRTIN/a2089avaiSingle Inverter Gate


SN74AUC1G04DCKR ,Single Inverter GateFeatures 3 DescriptionThis single inverter gate is operational at 0.8-V to 2.7-1• Latch-Up Performa ..
SN74AUC1G04DRLR ,Single Inverter Gate 5-SOT -40 to 85Logic Diagram (Positive Logic)2 4A Y1An IMPORTANT NOTICE at the end of this data sheet addresses av ..
SN74AUC1G04YZPR ,Single Inverter GateElectrical Characteristics....... 59.6 Glossary..... 96.6 Switching Characteristics: C = 15 pF.... ..
SN74AUC1G06DBVR ,Single Inverter Buffer/Driver with Open-Drain OutputFEATURES• Available in the Texas Instruments • Low Power Consumption, 10-μA Max ICCNanoStar™ and Na ..
SN74AUC1G06DCKR ,Single Inverter Buffer/Driver with Open-Drain OutputElectrical Characteristicsover recommended operating free-air temperature range (unless otherwise n ..
SN74AUC1G07DBVR ,Single Buffer/Driver with Open-Drain OutputElectrical Characteristics....... 59.6 Glossary..... 86.6 Switching Characteristics: C = 15 pF.... ..
SN74LVCH245APW ,Octal Bus Transceiver With 3-State OutputsMaximum Ratings . 511 Power Supply Recommendations... 137.2 Handling Ratings. 512 Layout.... 137.3 ..
SN74LVCH245APWR ,Octal Bus Transceiver With 3-State OutputsElectrical Characteristics table. 7• Added data to –40°C TO 85°C Switching Characteristics table... ..
SN74LVCH245APWRG4 ,Octal Bus Transceiver With 3-State Outputs 20-TSSOP -40 to 85Features 2 Applications1• Operate From 1.65 V to 3.6 V • Servers• Inputs Accept Voltages to 5.5 V • ..
SN74LVCH245APWRG4 ,Octal Bus Transceiver With 3-State Outputs 20-TSSOP -40 to 85Sample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareSN54LVCH245A,SN74LVC ..
SN74LVCH245ARGYR ,Octal Bus Transceiver With 3-State OutputsFeatures list 1• Added Applications........ 1• Added Device Information table...... 1• Added Handli ..
SN74LVCH245ARGYR ,Octal Bus Transceiver With 3-State OutputsBlock Diagram... 113 Description....... 19.3 Feature Description.... 114 Simplified Schematic 19.4 ..


SN74AUC1G04DBVR-SN74AUC1G04DBVRG4-SN74AUC1G04DCKR-SN74AUC1G04DRLR-SN74AUC1G04YZPR
Single Inverter Gate
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SN74AUC1G04

SCES370R–SEPTEMBER 2001–REVISED JUNE 2017
SN74AUC1G04 Single Inverter Gate Features
Latch-Up Performance Exceeds 100 mA Per
JESD 78, ClassII ESD Protection Exceeds JESD22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101) Availablein the Texas Instruments NanoFree™
Package Optimized for 1.8-V Operation andIs 3.6-V I/O
Tolerantto Support Mixed-Mode Signal Operation Ioff Supports Partial Power Down Mode and Back
Drive Protection Sub-1-V Operable Maxtpdof 2.2nsat 1.8V Low Power Consumption, 10-µA Maximum ICC ±8-mA Output Driveat 1.8V Applications AV Receiver Audio Dock: Portable Blu-Ray Player and Home Theater Embedded PC MP3 Player/Recorder (Portable Audio) Personal Digital Assistant (PDA) Power: Telecom/Server AC/DC Supply: Single
Controller: Analog and Digital Solid State Drive (SSD): Client and Enterprise TV: LCD/Digital and High-Definition (HDTV) Tablet: Enterprise Video Analytics: Server Wireless Headset, Keyboard, and Mouse Description
This single inverter gateis operationalat 0.8-Vto 2.7- VCC, butis designed specifically for 1.65-Vto 1.95- VCC operation.
The SN74AUC1G04 performs the Boolean functionYA.
NanoFree™ package technology is a major
breakthroughinIC packaging concepts, using the die the package.
This deviceis fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
ouput, preventing damaging current backflow through
the device whenitis powered down.
For more information about AUC Little Logic devices,
see Applicationsof Texas Instruments AUC Sub-1-V
Little Logic Devices, SCEA027.
Device Information(1)

(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Logic Diagram (Positive Logic)
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