SN74AS373N ,Octal D-Type Transparent Latches with 3-state Outputslogic diagram (positive logic)1OE11LEC121Q31D 1DTo Seven Other Channels2POST OFFICE BOX 655303 • DA ..
SN74AS373NSR ,Octal D-Type Transparent Latches with 3-state Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74AS373NSR ,Octal D-Type Transparent Latches with 3-state Outputsmaximum ratings over operating free-air temperature range (SN54ALS373A,†SN74ALS373A) (unless otherw ..
SN74AS374 ,Octal D-Type Edge Triggered Flip-Flops with 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74AS374DW ,Octal D-Type Edge Triggered Flip-Flops with 3-State Outputslogic diagram (positive logic)11 OEOEEN11 11CLKCLK C1C121Q33 21D 1D1D 1D 1Q4 52D 2Q7 63D 3Q8 94D 4Q ..
SN74AS374N ,Octal D-Type Edge Triggered Flip-Flops with 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74LVC74APWR ,Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And PresetSupport &Product Order Tools &TechnicalCommunityFolder Now Documents SoftwareSN54LVC74A,SN74LVC74AS ..
SN74LVC74APWRG4 ,Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset 14-TSSOP -40 to 125Electrical Characteristics....... 511.2 Layout Example....... 136.6 Timing Requirements: SN54LVC74A ..
SN74LVC74APWRG4 ,Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset 14-TSSOP -40 to 125Support &Product Order Tools &TechnicalCommunityFolder Now Documents SoftwareSN54LVC74A,SN74LVC74AS ..
SN74LVC74ARGYR ,Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And PresetMaximum Ratings.. 49.2 Typical Application .... 116.2 ESD Ratings........ 410 Power Supply Recommen ..
SN74LVC74PWR , 8-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SN74LVC821ADBR ,10-Bit Bus-Interface Flip-Flop With 3-State OutputsMaximum Ratingsover operating free-air temperature range (unless otherwise noted)MIN MAX UNITV Supp ..
SN74AS373-SN74AS373DW-SN74AS373N-SN74AS373NSR
Octal D-Type Transparent Latches with 3-state Outputs
pnp Inputs Reduce dc Loading on DataLines
descriptionThese octal transparent D-type latches feature
3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance
loads. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q
outputs follow the data (D) inputs. When LE is
taken low, the Q outputs are latched at the logic
levels set up at the D inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low) or a high-impedance state. In
the high-impedance state, the outputs neither
load nor drive the bus lines significantly. The
high-impedance state and the increased drive
provide the capability to drive bus lines without
interface or pullup components.
OE does not affect internal operations of the
latches. Old data can be retained or new data can
be entered while the outputs are off.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
GND
SN54ALS373A, SN54AS373... FK PACKAGE
(TOP VIEW)1QOE
GND
