SN74ALVCH16901DGGR ,18-Bit Universal Bus Transceiver with Parity Generators/Checkers/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74ALVCH16901DGGR ,18-Bit Universal Bus Transceiver with Parity Generators/Checkers SCES010F − JULY 1995 − REV ..
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SN74ALVCH16901-SN74ALVCH16901DGGR
18-Bit Universal Bus Transceiver with Parity Generators/Checkers 64-TSSOP -40 to 85
Clocked Mode Operates From 1.65 V to 3.6 V Max tpd of 4.4 ns at 3.3 V ±24-mA Output Drive at 3.3 V
Simultaneously Generates and Checks
Parity Option to Select Generate Parity and Check
or Feed-Through Data/Parity in A-to-B or
B-to-A Directions Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors Latch-Up Performance Exceeds 250 mA Per
JESD 17 ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
description/ordering informationThis 18-bit (dual-octal) noninverting registered
transceiver is designed for 1.65-V to 3.6-V VCC
operation.
The SN74ALVCH16901 is a dual 9-bit to dual 9-bit
parity transceiver with registers. The device can
operate as a feed-through transceiver or it can
generate/check parity from the two 8-bit data
buses in either direction.
The SN74ALVCH16901 features independent
clock (CLKAB or CLKBA), latch-enable (LEAB or
LEBA), and dual 9-bit clock-enable (CLKENAB or CLKENBA) inputs. It also provides parity-enable (SEL) and
parity-select (ODD/EVEN) inputs and separate error-signal (ERRA or ERRB) outputs for checking parity. The
direction of data flow is controlled by OEAB and OEBA. When SEL is low, the parity functions are enabled. When
SEL is high, the parity functions are disabled, and the device acts as an 18-bit registered transceiver.
ORDERING INFORMATION†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1ERRA
1APAR
GND
1A1
1A2
1A3
VCC
1A4
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
2A5
VCC
2A6
2A7
2A8
GND
2APAR
2ERRA
OEAB
SEL
2CLKENAB
1ERRB
1BPAR
GND
1B1
1B2
1B3
VCC
1B4
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
2B5
VCC
2B6
2B7
2B8
GND
2BPAR
2ERRB
OEBA
ODD/EVEN
2CLKENBA
