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SN74ALS74A-SN74ALS74AD-SN74ALS74ADR-SN74ALS74AN-SN74ALS74ANSR Fast Delivery,Good Price
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SN74ALS74ATIN/a1426avaiDual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset
SN74ALS74ADTIN/a497avaiDual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset
SN74ALS74ADN/a72avaiDual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset
SN74ALS74ADRTIN/a5900avaiDual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset
SN74ALS74ANTI ?N/a5avaiDual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset
SN74ALS74ANSRN/a2000avaiDual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset


SN74ALS74ADR ,Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Presetlogic diagram (positive logic)PRECLR QQCLKD‡absolute
SN74ALS74AN ,Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Presetmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74ALS74ANSR ,Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Presetelectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
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SN74ALS804AN ,Hex 2-Input NAND Driverselectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
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SN74LVC1G17DBVR ,Single Schmitt-Trigger BufferMaximum Ratings . 411 Power Supply Recommendations... 127.2 Handling Ratings. 412 Layout.... 127.3 ..
SN74LVC1G17DBVRG4 ,Single Schmitt-Trigger Buffer 5-SOT-23 -40 to 125Features... 1 9 Detailed Description........ 109.1 Overview.. 102 Applications..... 19.2 Functional
SN74LVC1G17DBVT ,Single Schmitt-Trigger BufferMaximum Ratingsover operating free-air temperature range (unless otherwise noted)MIN MAX UNITV Supp ..
SN74LVC1G17DCKR ,Single Schmitt-Trigger BufferMaximum Ratingsover operating free-air temperature range (unless otherwise noted)MIN MAX UNITV Supp ..
SN74LVC1G17DCKRG4 ,Single Schmitt-Trigger Buffer 5-SC70 -40 to 125Sample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareSN74LVC1G17SCES351V– ..


SN74ALS74A-SN74ALS74AD-SN74ALS74ADR-SN74ALS74AN-SN74ALS74ANSR
Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset
description
These devices contain two independent
positive-edge-triggered D-type flip-flops. A low
level at the preset (PRE) or clear (CLR) inputs sets
or resets the outputs regardless of the levels of the
other inputs. When PRE and CLR are inactive
(high), data at the data (D) input meeting the
setup-time requirements are transferred to the
outputs on the positive-going edge of the clock
(CLK) pulse. Clock triggering occurs at a voltage
level and is not directly related to the rise time of
CLK. Following the hold-time interval, data at the
D input can be changed without affecting the
levels at the outputs.
The SN54ALS74A and SN54AS74A are
characterized for operation over the full military
temperature range of −55°C to 125°C. The
SN74ALS74A and SN74AS74A are characterized
for operation from 0°C to 70°C.
FUNCTION TABLE
The output levels in this configuration are not
specified to meet the minimum levels for VOH if the
lows at PRE and CLR are near VIL maximum.
Furthermore, this configuration is nonstable; that
is, it does not persist when PRE or CLR returns to
its inactive (high) level.
1CLK
1PRE
GND
2CLK
2PRE
SN54ALS74A, SN54AS74A... FK PACKAGE
(TOP VIEW)

2CLK
2PRE
1CLK
1PRE1CLRNC2Q2CLR
NC − No internal connection
GND
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