SN74ALS580BN ,Octal D-Type Transparent Latches With 3-State Outputs SDAS277 − JA ..
SN74ALS620A ,Octal Bus Transceivers SN74ALS620A, SN74ALS621A, SN74ALS623A, SN74AS623 OCTAL BUS TRANSCEIVERS SDAS226A – DECEMBER 1982 ..
SN74ALS620AN ,Octal Bus Transceiversmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SN74ALS620AN ,Octal Bus Transceiversmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74ALS621A-1DW , OCTAL BUS TRANSCEIVERS
SN74ALS621A-1N ,Octal Bus Transceivers SN74ALS620A, SN74ALS621A, SN74ALS623A, SN74AS623 OCTAL BUS TRANSCEIVERS SDAS226A – DECEMBER 1982 ..
SN74LVC1G00IDCKREP ,Enhanced Product Single 2-Input Positive-Nand Gate 5-SC70 -40 to 85SCES450D–DECEMBER 2003–REVISED SEPTEMBER 2006(1)Recommended Operating ConditionsMIN MAX UNITOperati ..
SN74LVC1G00MDCKREP ,Enhanced Product Single 2-Input Positive-Nand Gate 5-SC70 -55 to 125maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functi ..
SN74LVC1G02DBVR ,Single 2-Input Positive-NOR GateFeatures, Description, and Device Information table..... 1• Added Pin Functions table. .... 3• Adde ..
SN74LVC1G02DBVT ,Single 2-Input Positive-NOR GateFeatures.. 12 Submit Documentation Feedback Copyright 1999–2014, Texas Instruments IncorporatedPro ..
SN74LVC1G02DCKR ,Single 2-Input Positive-NOR GateSample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareSN74LVC1G02SCES213X– ..
SN74LVC1G02DCKRG4 ,Single 2-Input Positive-NOR Gate 5-SC70 -40 to 125 SCES213X–APRIL 1999–REVISED APRIL 20146 Pin Configuration and FunctionsDBV PACKAGE DCK PACKAGE DRL ..
SN74ALS580BN
Octal D-Type Transparent Latches With 3-State Outputs
Package Options Include PlasticSmall-Outline (DW) Packages, Ceramic
Chip Carriers (FK), Standard Plastic (N) and
Ceramic (J) 300-mil DIPs, and Ceramic Flat
(W) Packages
descriptionThese octal D-type transparent latches feature
3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance
loads. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, outputs
(Q) respond to the data (D) inputs. When LE is low,
the outputs are latched to retain the data that was
set up.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low) or a high-impedance state. In
the high-impedance state, the outputs neither load
nor drive the bus lines significantly. The
high-impedance state and the increased drive
provide the capability to drive bus lines without
interface or pullup components.
OE does not affect internal operations of the latches. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
The SN54ALS580B is characterized for operation over the full military temperature range of −55°C to 125°C.
The SN74ALS580B and SN74AS580 are characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each latch)
