SN74ALS323N ,8-Bit Universal Shift/Storage Registers With Synchronous Clear And 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74ALS32D ,Quad 2-input positive-OR gateslogic diagram (positive logic)111A 31A ≥ 1 31Y1Y 221B1B442A62A 65 2Y2Y52B2B93A 983A 810 3Y3B 3Y1012 ..
SN74ALS32DR ,Quad 2-input positive-OR gates SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SDAS113B – APRIL 19 ..
SN74ALS32N ,Quad 2-input positive-OR gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74ALS32NSR ,Quad 2-input positive-OR gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74ALS35A ,Hex Noninverters with Open-Collector Outputs10-Jun-2014PACKAGING INFORMATIONOrderable Device Status Package Type Package Pins Package Eco Plan ..
SN74LVC125APWLE ,Quadruple Bus Buffer Gate With 3-State Outputsfeatures independent line• Operates From 1.65 V to 3.6 Vdrivers with 3-state outputs. Each output i ..
SN74LVC125APWR ,Quadruple Bus Buffer Gate With 3-State OutputsMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITV S ..
SN74LVC125APWRG4 ,Quadruple Bus Buffer Gate With 3-State Outputs 14-TSSOP -40 to 125Maximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITV S ..
SN74LVC125APWTG4 ,Quadruple Bus Buffer Gate With 3-State Outputs 14-TSSOP -40 to 125 SCAS290Q–JANUARY 1993–REVISED JANUARY 20156 Pin Configuration and FunctionsD, DB, NS, OR PW PACKAG ..
SN74LVC125ARGYR ,Quadruple Bus Buffer Gate With 3-State OutputsElectrical Characteristics....... 613.1 Trademarks..... 137.6 Switching Characteristics...... 613.2 ..
SN74LVC126A ,Quadruple Bus Buffer Gate With 3-State Outputs SCAS339S–MARCH 1994–REVISED FEBRUARY 20175 Pin Configuration and FunctionsD, DB, DGV, NS, or PW Pa ..
SN74ALS323N
8-Bit Universal Shift/Storage Registers With Synchronous Clear And 3-State Outputs
− Shift Left
− Load Data Operate With Outputs Enabled or at High
Impedance 3-State Outputs Drive Bus Lines Directly Can Be Cascaded for n-Bit Word Lengths Synchronous Clear Applications:
− Stacked or Push-Down Registers
− Buffer Storage
− Accumulator Registers Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic (N)
and Ceramic (J) 300-mil DIPs
descriptionThese 8-bit universal shift/storage registers
feature multiplexed input/output (I/O) ports to
achieve full 8-bit data handling in a 20-pin
package. Two function-select (S0, S1) inputs and
two output-enable (OE1, OE2) inputs can be used
to choose the modes of operation listed in the
function table.
Synchronous parallel loading is accomplished by taking both S0 and S1 high. This places the 3-state outputs
in the high-impedance state and permits data applied on the I/O ports to be clocked into the register. Reading
out of the register can be accomplished while the outputs are enabled in any mode. Clearing occurs
synchronously when the clear (CLR) input is low. T aking either OE1 or OE2 high disables the outputs but has
no effect on clearing, shifting, or storing data.
The SN54ALS323 is characterized for operation over the full military temperature range of −55°C to 125°C. The
SN74ALS323 is characterized for operation from 0°C to 70°C.
