SN74ALS29823NT ,9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ALS29827 ,10-Bit Buffers/Drivers With 3-State Outputs SN74ALS29827, SN74ALS29828 10-BIT BUFFERS AND BUS DRIVERS WITH 3-STATE OUTPUTS SDAS095B – JANUARY ..
SN74ALS29827NT , 10-BIT BUFFERS AND BUS DRIVERS WITH 3-STATE OUTPUTS
SN74ALS29827NT , 10-BIT BUFFERS AND BUS DRIVERS WITH 3-STATE OUTPUTS
SN74ALS29833DW ,8-BIT TO 9-BIT PARITY BUS TRANSCEIVER
SN74ALS29833DWR , 8-BIT TO 9-BIT PARITY TRANSCEIVERS
SN74LVC10APW ,Triple 3-Input Positive-NAND Gatemaximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functi ..
SN74LVC10APWR ,Triple 3-Input Positive-NAND GateFEATURESD, DB, NS, OR PW PACKAGE• Operates From 1.65 V to 3.6 V(TOP VIEW)• Specified From –40°C to ..
SN74LVC112A ,Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And PresetSample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareSN74LVC112ASCAS289M– ..
SN74LVC112ADBR ,Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And PresetFeatures 2 Applications1• Operates From 1.65 V to 3.6 V • Servers• Inputs Accept Voltages to 5.5 V ..
SN74LVC112ADGVR ,Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset SCAS289M–JANUARY 1993–REVISED DECEMBER 20146 Pin Configuration and FunctionsD,DB,DGV,NS,ORPWPACKAG ..
SN74LVC112ADGVRG4 ,Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset 16-TVSOP -40 to 125Electrical Characteristics ...... 612.2 Layout Example....... 127.6 Timing Requirements, –40°C to 8 ..
SN74ALS29823NT
9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
