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SN74ALS232BDWTIN/a380avai16 x 4 asynchronous FIFO memory
SN74ALS232BNTIN/a265avai16 x 4 asynchronous FIFO memory


SN74ALS232BDW ,16 x 4 asynchronous FIFO memoryfeatures high speed and fastfall-through times. It is organized as 16 words by4 bits.A first-in, fi ..
SN74ALS232BFN , 16 × 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY
SN74ALS232BFN , 16 × 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY
SN74ALS232BN ,16 x 4 asynchronous FIFO memorymaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
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SN74ALS233BN ,16 x 5 asynchronous FIFO memory
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SN74LV8151NT , 10-BIT UNIVERSAL SCHMITT-TRIGGER BUFFER WITH 3-STATE OUTPUTS
SN74LV8151PW ,10-Bit Universal Schmitt-Trigger Buffers With 3-State Outputslogic diagram223PA322B N131T/C OE4D121Y1To Seven Other Channels2POST OFFICE BOX 655303 • DALLAS, TE ..
SN74LV8151PWR ,10-Bit Universal Schmitt-Trigger Buffers With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74LV8151PWRG4 , 10-BIT UNIVERSAL SCHMITT-TRIGGER BUFFER WITH 3-STATE OUTPUTS


SN74ALS232BDW-SN74ALS232BN
16 x 4 asynchronous FIFO memory
Fall-Through Time 14 ns Typical 3-State Outputs Package Options Include PlasticSmall-Outline Package (DW), Plastic Chip
Carriers (FN), and Standard Plastic 300-mil
DIPs (N)
description

This 64-bit memory features high speed and fast
fall-through times. It is organized as 16 words by
4 bits.
A first-in, first-out (FIFO) memory is a storage
device that allows data to be written into and read
from its array at independent data rates. This
FIFO is designed to process data at rates up to MHz in a bit-parallel format, word by word.
Data is written into memory on a low-to-high
transition at the load-clock (LDCK) input and is
read out on a low-to-high transition at the
unload-clock (UNCK) input. The memory is full
when the number of words clocked in exceeds by
16 the number of words clocked out. When the
memory is full, LDCK signals have no effect on the
data residing in memory. When the memory is
empty, UNCK signals have no effect.
Status of the FIFO memory is monitored by the FULL and EMPTY output flags. The FULL output is low when
the memory is full and high when it is not full. The EMPTY output is low when the memory is empty and high
when it is not empty.
A low level on the reset (RST) input resets the internal stack-control pointers and also sets EMPTY low and sets
FULL high. The Q outputs are not reset to any specific logic level. The first low-to-high transition on LDCK, after
either a RST pulse or from an empty condition, causes EMPTY to go high and the data to appear on the
Q outputs. It is important to note that the first word does not have to be unloaded. Data outputs are noninverting
with respect to the data inputs and are at high impedance when the output-enable (OE) input is low. OE does
not affect the FULL or EMPTY output flags. Cascading is easily accomplished in the word-width direction but
is not possible in the word-depth direction.
The SN74ALS232B is characterized for operation from 0°C to 70°C.
LDCK
GND
EMPTY
LDCK
FN PACKAGE
(TOP VIEW)
NC
RST
UNCK
GND
FULL
EMPTY
RST
NC – No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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