SN74AHCT373PWR ,Octal Transparent D-Type Latches With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74AHCT373PWRG4 ,Octal Transparent D-Type Latches With 3-State Outputs 20-TSSOP -40 to 85 SN54AHCT373, SN74AHCT373 OCTAL TRANSPARENT D-TYPE LATCHESWITH 3-STATE OUTPUTSSCLS239M – OCTOBER 19 ..
SN74AHCT374 ,Octal D-type Edge-Triggered Flip-Flops With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74AHCT374DW ,Octal D-type Edge-Triggered Flip-Flops With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74AHCT374DW ,Octal D-type Edge-Triggered Flip-Flops With 3-State OutputsSN54AHCT374, SN74AHCT374 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPSWITH 3-STATE OUTPUTSSCLS241L – OCTOB ..
SN74AHCT374DWR ,Octal D-type Edge-Triggered Flip-Flops With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74LV10A ,Triple 3-Input Positive-NAND Gate SCES338E − SEPTEMBER 2000 − REVISED APRIL 2005SN ..
SN74LV10AD ,Triple 3-Input Positive-NAND Gate/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74LV10ANSR ,Triple 3-Input Positive-NAND Gatemaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74LV10APWR ,Triple 3-Input Positive-NAND Gatemaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74LV11ADGVR ,Triple 3-Input Positive-AND Gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74LV11APW ,Triple 3-Input Positive-AND Gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74AHCT373DBLE-SN74AHCT373DBR-SN74AHCT373DWR-SN74AHCT373PW-SN74AHCT373PWLE-SN74AHCT373PWR-SN74AHCT373PWRG4
Octal Transparent D-Type Latches With 3-State Outputs
description/ordering informationThe ’AHCT373 devices are octal-transparent D-type latches. When the latch-enable (LE) input is high, the Q
outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive bus lines without
interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
