74AHCT16373DGGRG4 ,16-Bit Transparent D-Type Latches With 3-State Outputs 48-TSSOP -40 to 125 SCLS336I–JANUARY 2000–REVISED AUGUST 20146 Pin Configuration and FunctionsSN54AHCT16373...WDPACKAG ..
74AHCT164D ,74AHC164; 74AHCT164; 8-bit serial-in/parallel-out shift registerGeneral descriptionThe 74AHC164; 74AHCT164 shift register is a high-speed Si-gate CMOS device and i ..
74AHCT1G00DCKRG4 ,Single 2-Input Positive-NAND Gate 5-SC70 -40 to 1256.3 Recommended Operating Conditions(1)over operating free-air temperature range (unless otherwise ..
74AHCT1G00GV ,2-input NAND gateLogic diagram6. Pinning information6.1 Pinning74AHC1G0074AHCT1G00BV 1 5CCA 2GND 3 4 Y001aaf092Fig 4 ..
74AHCT1G00GV ,2-input NAND gate
74AHCT1G00GW ,2-input NAND gateGeneral description74AHC1G00 and 74AHCT1G00 are high-speed Si-gate CMOS devices. They provide a2-in ..
74HC377D ,Octal D-type flip-flop with data enable; positive-edge triggerGENERAL DESCRIPTION• Ideal for addressable register
74HC377DB ,Octal D-type flip-flop with data enable; positive-edge triggerapplicationsstandard no. 7A.• Eight positive-edge triggered D-type flip-flopsThe 74HC/HCT377 have e ..
74HC377N ,74HC/HCT377; Octal D-type flip-flop with data enable; positive-edge triggerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC377PW ,74HC/HCT377; Octal D-type flip-flop with data enable; positive-edge triggerapplicationsstandard no. 7A.• Eight positive-edge triggered D-type flip-flopsThe 74HC/HCT377 have e ..
74HC377PW ,74HC/HCT377; Octal D-type flip-flop with data enable; positive-edge triggerGeneral descriptionThe 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The ..
74HC390D ,Dual decade ripple counterpin configuration. A HIGH level ondivided into four separately clocked sections. The countersthe nM ..
74AHCT16373DGGRG4-SN74AHCT16373DGGR-SN74AHCT16373DL
16-Bit Transparent D-Type Latches With 3-State Outputs 48-TSSOP -40 to 125
1OE
1LE
1D1 Seven Other Channels
1Q1
2OE
2LE
2D1
2Q1 Seven Other ChannelsCMOS) Process • Power Infrastructures• Inputs are TTL-Voltage Compatible • Servers Distributed VCC and GND Pins Minimize High-
Speed Switching Noise
3 Description Flow-Through Architecture Optimizes PCB Layout The SNxAHCT16373 devices are 16-bit transparent
D-type latches with 3-state outputs designed• Latch-Up Performance Exceeds 250 mA Per specifically for driving highly capacitiveor relativelyJESD17 low-impedance loads. They are particularly suitable• ESD Protection Exceeds 2000V Per MIL-STD- for implementing buffer registers, I/O ports,883, Method 3015; Exceeds 200V Using Machine bidirectional bus drivers, and working registers.Model(C= 200 pF,R=0)
Device Information(1)• Package Options Include:– Plastic Shrink Small-Outline (DL) Package– Thin Shrink Small-Outline (DGG) Package– Thin Very Small-Outline (DGV) Package– 80-mil Fine-Pitch Ceramic Flat (WD) Package
(1) Forall available packages, see the orderable addendumatUsing 25-mil Center-to-Center Spacings the endofthe data sheet.
Simplified Schematic
