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SN74AHCT132DTIN/a320avaiQuadruple Positive-NAND Gates With Schmitt-Trigger Inputs
SN74AHCT132DBRTIN/a22avaiQuadruple Positive-NAND Gates With Schmitt-Trigger Inputs
SN74AHCT132DRTIN/a395avaiQuadruple Positive-NAND Gates With Schmitt-Trigger Inputs
SN74AHCT132PWRTIN/a311avaiQuadruple Positive-NAND Gates With Schmitt-Trigger Inputs


SN74AHCT132DR ,Quadruple Positive-NAND Gates With Schmitt-Trigger Inputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74AHCT132PWR ,Quadruple Positive-NAND Gates With Schmitt-Trigger Inputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74AHCT138DBR ,3-Line to 8-Line Decoder / Demultiplexermaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74AHCT138DBRG4 ,3-Line to 8-Line Decoder / Demultiplexer 16-SSOP -40 to 85maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74AHCT138DGVR ,3-Line to 8-Line Decoder / Demultiplexermaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74AHCT138PW ,3-Line to 8-Line Decoder / Demultiplexerlogic diagram (positive logic)15Y01A14Y113Y22SelectBInputs12Y3DataOutputs11Y43C10Y59Y647G2AY75Enabl ..
SN74LS75NSR ,Quad bistable latches
SN74LS75NSR ,Quad bistable latches
SN74LS76N ,DUAL JK FLIP-FLOP WITH SET AND CLEAR
SN74LS796N ,TRI-STATE OCTAL BUFFERS
SN74LS796N ,TRI-STATE OCTAL BUFFERS
SN74LS798N ,TRI-STATE OCTAL BUFFERS


SN74AHCT132D-SN74AHCT132DBR-SN74AHCT132DR-SN74AHCT132PWR
Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs
High Noise Immunity Same Pinouts as ’AHCT00 Latch-Up Performance Exceeds 250 mA PerJESD 17 ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
description

The ’AHCT132 devices are quadruple
positive-NAND gates.
These devices perform the Boolean function
Y = A • B or Y = A + B in positive logic.
Each circuit functions as a NAND gate, but
because of the Schmitt action, it has different input
threshold levels for positive- and negative-going
signals.
These circuits are temperature compensated and
can be triggered from the slowest of input ramps
and still give clean jitter-free output signals.
ORDERING INFORMATION

†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.1ANC3A4B
GND
SN54AHCT132... FK PACKAGE
(TOP VIEW)

NC – No internal connection
GND
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