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SN74AHC125QPWRQ1TIN/a275avaiQuadruple Bus Buffer Gates With 3-State Outputs


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SN74AHC125QPWRQ1
Automotive Catalog Quadruple Bus Buffer Gates With 3-State Outputs
CMOS) Process
�Operating Range 2-V to 5.5-V VCC
�Latch-Up Performance Exceeds 250 mA Per
JESD 17
description/ordering information

The SN74AHC125 is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each
output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate
passes the data from the A input to its Y output.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
� For the most current package and ordering information, see the Package Option Addendum at the end of
this document, or see the TI web site at http://www.ti.com. Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
FUNCTION TABLE
(each buffer)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2OE
GND
3OE
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