SN74AHC125MPWREP ,Enhanced Product Quadruple Bus Buffer Gates With 3-State Outputs 14-TSSOP -55 to 125SN74AHC125-EP QUADRUPLE BUS BUFFER GATEWITH 3-STATE OUTPUTSSCLS485A – MAY 2003 – REVISED JUNE 2003D ..
SN74AHC125N ,Quadruple Bus Buffer Gates With 3-State OutputsSample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareSN54AHC125,SN74AHC12 ..
SN74AHC125NSR ,Quadruple Bus Buffer Gates With 3-State OutputsSample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareSN54AHC125,SN74AHC12 ..
SN74AHC125PW ,Quadruple Bus Buffer Gates With 3-State OutputsLogic Diagram (Positive Logic)1 101OE 3OE2 3 9 81A 1Y 3A 3Y4 132OE 4OE5 6 12 112A 2Y 4A 4YPin numbe ..
SN74AHC125PWLE ,Quadruple Bus Buffer Gates With 3-State OutputsElectrical Characteristics....... 612.1 Documentation Support.... 166.6 Switching Characteristics: ..
SN74AHC125PWR ,Quadruple Bus Buffer Gates With 3-State OutputsTable of Contents8.2 Functional
SN74LS32MEL ,Quad 2-Input OR Gate
SN74LS32MEL ,Quad 2-Input OR Gate
SN74LS32NE4 ,Quad 2-input positive-OR gates 14-PDIP 0 to 70
SN74LS33 ,Quad 2-input positive-NOR buffers with open collector outputs
SN74LS33DR ,Quad 2-input positive-NOR buffers with open collector outputs
SN74LS352N ,DUAL 4-INPUT MULTIPLEXERSN54/74LS352DUAL 4-INPUT MULTIPLEXERThe SN54/74LS352 is a very high-speed Dual 4-input Multiplexer ..
SN74AHC125MPWREP
Enhanced Product Quadruple Bus Buffer Gates With 3-State Outputs 14-TSSOP -55 to 125
Enhanced Diminishing ManufacturingSources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree† EPIC (Enhanced-Performance Implanted
CMOS) Process Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per
JESD 17 ESD Protection Exceeds 1000 V Per
MIL-STD-833, Method 3015; Exceeds 150 V
Using Machine Model (C = 200 pF, R = 0)†Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
description/ordering informationThe SN74AHC125 is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each
output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective gate
passes the data from the A input to its Y output.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2OE
GND
3OE
