SN74ACT1073DW ,16-Bit Bus Termination Networks With Bus Hold Functionmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74ACT1073NSR ,16-Bit Bus Termination Networks With Bus Hold FunctionSN74ACT107316-BIT BUS-TERMINATION ARRAYWITH BUS-HOLD FUNCTIONSCAS193A − MARCH 1992 − REVISED NOVEMB ..
SN74ACT10D ,Triple 3-Input Positive-NAND Gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74ACT10DG4 ,Triple 3-Input Positive-NAND Gates 14-SOIC -40 to 85/sc/package.FUNCTION TABLE(each gate)INPUTSOUTPUT OUTPUTA B C YH H H LL XX HX LX HX X L HPlease be ..
SN74ACT10N ,Triple 3-Input Positive-NAND Gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74ACT10PW ,Triple 3-Input Positive-NAND Gateslogic diagram, each gate (positive logic)11A2 121B 1Y131C32A4 62B2Y52C113A8103Y3B93CPin numbers sho ..
SN74LS221NSR ,Dual monostable multivibrators with Schmitt-trigger inputsfeatures a negative-transition-2C 8 14 2CLRtriggered input and a positive-transition-triggeredext9 ..
SN74LS2323 ,Dual Line Receiver 8-SOIC 0 to 70maximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SN74LS2323D ,Dual Line Receiver 8-SOIC 0 to 70 SDLS965 − OCTOBER 2004D PACKAGE Single 5-V Supply(TOP VIEW) ±100-mV Sens ..
SN74LS2323DR ,Dual Line Receiver 8-SOIC 0 to 70maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74LS240 ,Octal Buffer/Line Driver with 3-State OutputsSample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareSN54LS240,SN54LS241, ..
SN74LS240 ,Octal Buffer/Line Driver with 3-State OutputsFeatures 3 DescriptionThe SNx4LS24x, SNx4S24x octal buffers and line1• Inputs Tolerant Down to 2 V, ..
SN74ACT1073DW-SN74ACT1073NSR
16-Bit Bus Termination Networks With Bus Hold Function
SN74ACT1073
16-BIT BUS-TERMINATION ARRAY
WITH BUS-HOLD FUNCTION
SCAS193A − MARCH 1992 − REVISED NOVEMBER 2002
Designed to Ensure Defined Voltage Levels
on Floating Bus Lines in CMOS Systems 4.5-V to 5.5-V VCC Operation Inputs Accept Voltages to 5.5 V Reduces Undershoot and Overshoot
Caused By Line Reflections Repetitive Peak Forward
Current ...IFRM = 100 mA Inputs Are TTL-Voltage Compatible Low Power Consumption (Like CMOS) Center-Pin VCC and GND Configuration
Minimizes High-Speed Switching Noise ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
description/ordering informationThis device is designed to terminate bus lines in CMOS systems. The integrated low-impedance diodes clamp
the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity. The device
also contains a bus-hold function that consists of a CMOS-buffer stage with a high-resistance feedback path
between its output and its input. The SN74ACT1073 prevents bus lines from floating without using pullup or
pulldown resistors.
The high-impedance inputs of these internal buffers are connected to the input terminals of the device. The
feedback path on each internal buffer stage keeps a bus line tied to the bus holder at the last valid logic state
generated by an active driver before the bus switches to the high-impedance state.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
GND
GND
D16
D15
D14
D13
VCC
VCC
D12
D11
D10
DW OR NS PACKAGE
(TOP VIEW)
