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SN74ABTH16260TIN/a111avai12-Bit To 24-Bit Multiplexed D-Type Latches With 3-State Outputs
SN74ABTH16260DLTEXASN/a101avai12-Bit To 24-Bit Multiplexed D-Type Latches With 3-State Outputs
SN74ABTH16260DLRTIN/a684avai12-Bit To 24-Bit Multiplexed D-Type Latches With 3-State Outputs


SN74ABTH16260DLR ,12-Bit To 24-Bit Multiplexed D-Type Latches With 3-State Outputs SN54ABT16260, SN74ABTH16260 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCHESWITH 3-STATE OUTPUTSSCBS204 ..
SN74ABTH16460 ,4-to-1 Multiplexer/Demultiplexer Transceivers With 3-State Outputs
SN74ABTH16460DL , 4-TO-1 MULTIPLEXED/DEMULTIPLEXED TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74ABTH16460DLR ,4-to-1 Multiplexer/Demultiplexer Transceivers With 3-State Outputs
SN74ABTH182504A ,Scan Test Devices With 20-Bit Universal Bus Transceivers SN54ABTH18504A, SN54ABTH182504A, SN74ABTH18504A, SN74ABTH182504A SCAN TEST DEVICES WITH20-BIT UNIV ..
SN74ABTH182504APM ,Scan Test Devices With 20-Bit Universal Bus Transceivers SN54ABTH18504A, SN54ABTH182504A, SN74ABTH18504A, SN74ABTH182504A SCAN TEST DEVICES WITH20-BIT UNIV ..
SN74LS162N ,BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERSSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN74LS163AD ,BCD decade counter/4-bit binary counter
SN74LS163ADR ,Synchronous 4-Bit Binary Counters
SN74LS163AMR1 , BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERSSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN74LS163AN ,BCD decade counter/4-bit binary counterSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN74LS163ANSR ,Synchronous 4-Bit Binary Counters


SN74ABTH16260-SN74ABTH16260DL-SN74ABTH16260DLR
12-Bit To 24-Bit Multiplexed D-Type Latches With 3-State Outputs
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
High-Impedance State During Power Up
and Power Down
Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
High-Drive Outputs (–32-mA IOH , 64-mA IOL) Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) Package and
380-mil Fine-Pitch Ceramic Flat (WD)
Package Using 25-mil Center-to-Center
Spacings
description

The SN54ABT16260 and SN74ABTH16260 are
12-bit to 24-bit multiplexed D-type latches used in
applications in which two separate data paths
must be multiplexed onto, or demultiplexed from,
a single data path. Typical applications include
multiplexing and/or demultiplexing of address and
data information in microprocessor or
bus-interface applications. This device is also
useful in memory-interleaving applications.
Three 12-bit I/O ports (A1–A12, 1B1–1B12, and 2B1–2B12) are available for address and/or data transfer. The
output-enable (OE1B, OE2B, and OEA) inputs control the bus-transceiver functions. The OE1B and OE2B
control signals also allow bank control in the A-to-B direction.
Address and/or data information can be stored using the internal storage latches. The latch-enable (LE1B,
LE2B, LEA1B, and LEA2B) inputs are used to control data storage. When the latch-enable input is high, the
latch is transparent. When the latch-enable input goes low, the data present at the inputs is latched and remains
latched until the latch-enable input is returned high.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2B3
GND
2B2
2B1
VCC
GND
GND
A10
A11
A12
VCC
1B1
1B2
GND
1B3
LE2B
SEL
2B4
GND
2B5
2B6
VCC
2B7
2B8
2B9
GND
2B10
2B11
2B12
1B12
1B11
1B10
GND
1B9
1B8
1B7
VCC
1B6
1B5
GND
1B4
LEA1B
OE1B
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