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SN74ABT841ADBRTIN/a531avai10-Bit Bus-Interface D-Type Latches With 3-State Outputs
SN74ABT841APWTIN/a25avai10-Bit Bus-Interface D-Type Latches With 3-State Outputs


SN74ABT841ADBR ,10-Bit Bus-Interface D-Type Latches With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74ABT841APW ,10-Bit Bus-Interface D-Type Latches With 3-State Outputs SN54ABT841, SN74ABT841A 10-BIT BUS-INTERFACE D-TYPE LATCHESWITH 3-STATE OUTPUTSSCBS196D – FEBRUARY ..
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SN74ABT853DBLE ,8-Bit To 9-Bit Parity Bus TransceiversSN54ABT853, SN74ABT8538-BIT TO 9-BIT PARITY BUS TRANSCEIVERSSCBS198G − FEBRUARY 1991 − REVISED OCTO ..
SN74ABT8543DL ,Scan Test Devices With Octal Registered Bus TransceiversSN54ABT8543, SN74ABT8543 SCAN TEST DEVICES WITHOCTAL REGISTERED BUS TRANSCEIVERSSCBS120E – AUGUST 1 ..
SN74LS160AN ,BCD decade counter/4-bit binary counterSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN74LS160N ,BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERSSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN74LS161A ,Synchronous 4-Bit Binary Counters
SN74LS161A ,Synchronous 4-Bit Binary Counters
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SN74LS161ADR2 , BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERSSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..


SN74ABT841ADBR-SN74ABT841APW
10-Bit Bus-Interface D-Type Latches With 3-State Outputs
Latch-Up Performance Exceeds 500 mA PerJEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
High-Impedance State During Power Up
and Power Down
High-Drive Outputs (–32-mA IOH, 64-mA IOL) Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Ceramic Flat (W) Package, and Plastic (NT)
and Ceramic (JT) DIPs
description

The SN54ABT841 and SN74ABT841A 10-bit
latches are designed specifically for driving highly
capacitive or relatively low-impedance loads.
They are particularly suitable for implementing
buffer registers, I/O ports, bidirectional bus
drivers, and working registers.
The ten transparent D-type latches provide true
data at their outputs.
A buffered output-enable (OE) input can be used
to place the ten outputs in either a normal logic
state (high or low logic levels) or a
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without need for interface or pullup
components.
OE does not affect the internal operations of the latch. Previously stored data can be retained or new data can
be entered while the outputs are in the high-impedance state.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT841 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74ABT841A is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
10D
GND
10Q
SN54ABT841... FK PACKAGE
(TOP VIEW)

10D
GND
10Q1DOENC 1Q2Q
NC – No internal connection
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