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Home ›  SS51 > SN74ABT374A-SN74ABT374ADBR-SN74ABT374ADW-SN74ABT374ADWR-SN74ABT374ADWRG4-SN74ABT374AN-SN74ABT374ANSR-SN74ABT374APW-SN74ABT374APWR,Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs
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Partno Mfg Dc Qty AvailableDescript
SN74ABT374ATIN/a160avaiOctal Edge-Triggered D-Type Flip-Flops with 3-State Outputs
SN74ABT374ADBRTIN/a1501avaiOctal Edge-Triggered D-Type Flip-Flops with 3-State Outputs
SN74ABT374ADWTIN/a57avaiOctal Edge-Triggered D-Type Flip-Flops with 3-State Outputs
SN74ABT374ADWRTIN/a4160avaiOctal Edge-Triggered D-Type Flip-Flops with 3-State Outputs
SN74ABT374ADWRG4TIN/a75avaiOctal Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-SOIC -40 to 85
SN74ABT374ANTIN/a325avaiOctal Edge-Triggered D-Type Flip-Flops with 3-State Outputs
SN74ABT374ANSRTIN/a3865avaiOctal Edge-Triggered D-Type Flip-Flops with 3-State Outputs
SN74ABT374APWTIN/a1867avaiOctal Edge-Triggered D-Type Flip-Flops with 3-State Outputs
SN74ABT374APWRTI ?N/a1906avaiOctal Edge-Triggered D-Type Flip-Flops with 3-State Outputs
SN74ABT374APWRTIN/a2846avaiOctal Edge-Triggered D-Type Flip-Flops with 3-State Outputs


SN74ABT374ADWR ,Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74ABT374ADWRG4 ,Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-SOIC -40 to 85maximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74ABT374AN ,Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputslogic diagram (positive logic)1OE11CLKC121Q31D1DTo Seven Other Channels2POST OFFICE BOX 655303 • DA ..
SN74ABT374ANSR ,Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74ABT374APW ,Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74ABT374APWR ,Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs SN54ABT374, SN74ABT374A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPSWITH 3-STATE OUTPUTSSCBS111G – FEBRU ..
SN74LS148N ,10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS/sc/package.FUNCTION TABLE − ’147, ’LS147INPUTS OUTPUTS1 2 3 4 5 6 7 8 9 D C B AH H H H H H H H H H ..
SN74LS148NSR ,8-line to 3-line priority encoder/sc/package.FUNCTION TABLE − ’147, ’LS147INPUTS OUTPUTS1 2 3 4 5 6 7 8 9 D C B AH H H H H H H H H H ..
SN74LS14D ,SCHMITT TRIGGERS DUAL GATE/HEX INVERTERElectrical Characteristics....... 512.1 Related Links.. 186.6 Switching Characteristics...... 512.2 ..
SN74LS14DBR ,Hex schmitt-trigger invertersMaximum Ratings.. 411 Layout.... 176.2 ESD Ratings........ 411.1 Layout Guidelines.... 176.3 Recomm ..
SN74LS14DBR ,Hex schmitt-trigger invertersElectrical Characteristics....... 512.1 Related Links.. 186.6 Switching Characteristics...... 512.2 ..
SN74LS14DBRG4 ,Hex schmitt-trigger inverters 14-SSOP 0 to 70Features... 18.4 Device Functional Modes.... 132 Applications..... 19 Application and Implementatio ..


SN74ABT374A-SN74ABT374ADBR-SN74ABT374ADW-SN74ABT374ADWR-SN74ABT374ADWRG4-SN74ABT374AN-SN74ABT374ANSR-SN74ABT374APW-SN74ABT374APWR
Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs
at VCC = 5 V, TA = 25°C High-Drive Outputs (–32-mA IOH, 64-mA IOL) ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Plastic (N) and Ceramic (J) DIPs, and
Ceramic Flat (W) Package
description

These 8-bit flip-flops feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The eight flip-flops of the SN54ABT374 and
SN74ABT374A are edge-triggered D-type
flip-flops. On the positive transition of the clock
(CLK) input, the Q outputs are set to the logic
levels set up at the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without need for interface or pullup components. OE does not affect internal operations of the flip-flop. Old data
can be retained or new data can be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT374 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74ABT374A is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN54ABT374... FK PACKAGE
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GND
CLK1QOE5D
GND
CLK
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