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SN74ABT16470TIN/a708avai16-Bit Registered Transceivers With 3-State OUtputs
SN74ABT16470DLTIN/a150avai16-Bit Registered Transceivers With 3-State OUtputs


SN74ABT16470 ,16-Bit Registered Transceivers With 3-State OUtputs SN54ABT16470, SN74ABT16470 16-BIT REGISTERED TRANSCEIVERSWITH 3-STATE OUTPUTSSCBS085E – FEBRUARY 1 ..
SN74ABT16470DL ,16-Bit Registered Transceivers With 3-State OUtputs SN54ABT16470, SN74ABT16470 16-BIT REGISTERED TRANSCEIVERSWITH 3-STATE OUTPUTSSCBS085E – FEBRUARY 1 ..
SN74ABT16500BDGGR ,18-Bit Universal Bus Transceivers With 3-State Outputs SN54ABT16500B, SN74ABT16500B 18-BIT UNIVERSAL BUS TRANSCEIVERSWITH 3-STATE OUTPUTSSCBS057G – DECEM ..
SN74ABT16500BDL ,18-Bit Universal Bus Transceivers With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74ABT16501 ,18-Bit Universal Bus Transceivers With 3-State Outputs SN54ABT16501, SN74ABT16501 18-BIT UNIVERSAL BUS TRANSCEIVERSWITH 3-STATE OUTPUTSSCBS086C – FEBRUAR ..
SN74ABT16501DGGR ,18-Bit Universal Bus Transceivers With 3-State Outputslogic diagram (positive logic)1OEAB55CLKAB2LEAB28LEBA30CLKBA27OEBA3A1 1D 54B1C1CLK1DC1CLKTo 17 Othe ..
SN74LS11 ,Triple 3-input positive-AND gates
SN74LS11 ,Triple 3-input positive-AND gates
SN74LS112 , DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
SN74LS112ADR ,Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset
SN74LS112AN ,Dual JK negative edge-triggered flip-flopSN54/74LS112ADUAL JK NEGATIVEEDGE-TRIGGERED FLIP-FLOPThe SN54/74LS112A dual JK flip-flop
SN74LS112ANSR ,Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset


SN74ABT16470-SN74ABT16470DL
16-Bit Registered Transceivers With 3-State OUtputs
JEDEC Standard JESD-17 Typical V OLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
High-Drive Outputs (–32-mA IOH, 64-mA IOL) Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
description

The ’ABT16470 are 16-bit registered transceivers
that contain two sets of D-type flip-flops for
temporary storage of data flowing in either
direction. The ’ABT16470 can be used as two 8-bit
transceivers or one 16-bit transceiver. Separate
clock (CLKAB or CLKBA) and output-enable
(OEAB or OEBA) inputs are provided for each
register to permit independent control in either
direction of data flow.
To avoid false clocking of the flip-flops, clock
enable (CLKEN) should not be switched from high
to low while CLK is high.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT16470 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT16470 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1CLKAB
1CLKENAB
GND
1A1
1A2CC
1A3
1A4
1A5
GND
1A6
1A7
1A8
2A1
2A2
2A3
GND
2A4
2A5
2A6
VCC
2A7
2A8
GND
2CLKENAB
2CLKAB
2OEAB
1CLKBA
1CLKENBA
GND
1B1
1B2CC
1B3
1B4
1B5
GND
1B6
1B7
1B8
2B1
2B2
2B3
GND
2B4
2B5
2B6
VCC
2B7
2B8
GND
2CLKENBA
2CLKBA
2OEBA
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