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Partno Mfg Dc Qty AvailableDescript
SN65HVD10DTIN/a20avai3.3V Differential Transceiver
SN65HVD10DRTIN/a2330avai3.3V Differential Transceiver
SN65HVD10DRG4TIN/a5000avai3.3 V Half-duplex RS-485 Transceiver, 32Mbps 8-SOIC -40 to 85
SN65HVD10PTIN/a2372avai3.3V Differential Transceiver
SN65HVD10QDTIN/a3750avai3.3V Differential Transceiver
SN65HVD10QDRTIN/a5avai3.3V Differential Transceiver
SN65HVD10QDRG4TIN/a5000avai3.3 V Half-duplex RS-485 Transceiver, 32Mbps 8-SOIC -40 to 125


SN65HVD10DRG4 ,3.3 V Half-duplex RS-485 Transceiver, 32Mbps 8-SOIC -40 to 85Maximum Ratings(1) (2)over operating free-air temperature range unless otherwise notedMIN MAX UNITV ..
SN65HVD10MDREP ,Enhanced Product 3.3-V Rs-485 Transceiver 8-SOIC -55 to 125FEATURES APPLICATIONS• Digital Motor Control• Controlled Baseline• Utility Meters– One Assembly/Tes ..
SN65HVD10P ,3.3V Differential TransceiverFeatures... 19.3 Feature Description.... 172 Applications..... 19.4 Device Functional Modes.... 173 ..
SN65HVD10Q , 3.3-V RS-485 TRANSCEIVERS
SN65HVD10QD ,3.3V Differential TransceiverMaximum Ratings.. 412.1 Layout Guidelines.... 237.2 ESD Ratings........ 412.2 Layout Example....... ..
SN65HVD10QDR ,3.3V Differential Transceiver SLLS505O–FEBRUARY 2002–REVISED FEBRUARY 20175 Device Comparison TablePART NUMBERSIGNALING RATE UNI ..
SN74HC32NSR ,Quadruple 2-Input Positive-OR GatesMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITV S ..
SN74HC32PW ,Quadruple 2-Input Positive-OR GatesBlock Diagram..... 9Information..... 134 Revision HistoryNOTE: Page numbers for previous revisions ..
SN74HC32PWLE ,Quadruple 2-Input Positive-OR GatesLogic Diagram (Positive Logic)AYBCopyright 2016, Texas Instruments Incorporated1An IMPORTANT NOTIC ..
SN74HC32PWR ,Quadruple 2-Input Positive-OR GatesMaximum Ratings.. 411.1 Layout Guidelines.... 126.2 ESD Ratings: SN74HC32..... 411.2 Layout Example ..
SN74HC32PWRG4 ,Quadruple 2-Input Positive-OR Gates 14-TSSOP -40 to 85Logic Diagram (Positive Logic)AYBCopyright 2016, Texas Instruments Incorporated1An IMPORTANT NOTIC ..
SN74HC354N ,8-Line To 1-Line Data Selectors/Multiplexers/Transparent Registers With 3-State Outputs 20-PDIP -40 to 85


SN65HVD10D-SN65HVD10DR-SN65HVD10DRG4-SN65HVD10P-SN65HVD10QD-SN65HVD10QDR-SN65HVD10QDRG4
3.3V Differential Transceiver
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SN65HVD10, SN65HVD11, SN65HVD12
SN75HVD10, SN75HVD11, SN75HVD12

SLLS505O –FEBRUARY 2002–REVISED FEBRUARY 2017
SNx5HVD1x 3.3-V RS-485 Transceivers

(1) The signaling rateofa lineisthe numberof voltage
transitions thatare madeper second expressedinthe units
bps (bitsper second). Features Operates Witha 3.3-V Supply Bus-Pin ESD Protection Exceeds 16-kV HBM 1/8 Unit-Load Option Available (Upto 256 Nodes the Bus) Optional Driver Output Transition Times for
Signaling Rates(1)of1 Mbps,10 Mbps, and Mbps Meetsor Exceeds the Requirementsof ANSI
TIA/EIA-485-A Bus-Pin Short-Circuit Protection From–7VtoV Low-Current Standby Mode:1 µA, Typical Open-Circuit, Idle-Bus, and Shorted-Bus Failsafe
Receiver Thermal Shutdown Protection Glitch-Free Power-Up and Power-Down Protection
for Hot-Plugging Applications SN75176 Footprint Applications Digital Motor Control Utility Meters Chassis-to-Chassis Interconnects Electronic Security Stations Industrial Process Control Building Automation Point-of-Sale (POS) Terminals and Networks Description
The SN65HVD10, SN75HVD10, SN65HVD11,
SN75HVD11, SN65HVD12, and SN75HVD12 bus
transceivers combinea 3-state differential line driver
and differential input line receiver that operate witha
single 3.3-V power supply. They are designed for
balanced transmission lines and meet or exceed
ANSI standard TIA/EIA-485-A and ISO 8482:1993.
These differential bus transceivers are monolithic
integrated circuits designed for bidirectional data
communication on multipoint bus-transmission lines.
The drivers and receivers have active-high and
active-low enables, respectively, that can be
externally connected togetherto functionas direction
control. Very low device standby supply current can achievedby disabling the driver and the receiver.
The driver differential outputs and receiver differential
inputs connect internallyto forma differential input/
output (I/O) bus port that is designed to offer
minimum loadingto the bus whenever the driveris
disabledor VCC=0. These parts feature wide positive
and negative common-mode voltage ranges making
them suitable for party-line applications.
Device Information(1)

(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Typical Application Diagram
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