SN65ELT22DR ,5V Dual TTL to Differential PECL Translator 8-SOIC -40 to 85........ SLLS924–DECEMBER 2008PECL DC CHARACTERISTICS(1)(2)At V = 5.0 V, GND = 0.0 V (unless otherw ..
SN65ELT23DGKR ,5V Dual Differential PECL Buffer to TTL Translator 8-VSSOP -40 to 85FEATURESPIN ASSIGNMENT• Dual 5-V Differential PECL-to-TTL Buffer• 24-mA TTL OuputsD or DGK PACKAGE• ..
SN65ELT23DR ,5V Dual Differential PECL Buffer to TTL Translator 8-SOIC -40 to 85. SLLS925–JUNE 2009PECL INPUT DC CHARACTERISTICS(1)(2)At V = 5.0 V, GND = 0.0 V (unless otherwise n ..
SN65EPT21DR ,3.3V ECL Differential Receiver 8-SOIC -40 to 85 SLLS970 –NOVEMBER 2009PECL DC CHARACTERISTICS(1) (2)At V = 3.3 V, GND = 0.0 V (unless otherwise no ..
SN65EPT22DR ,3.3 V Dual LVTTL/LVCMOS to Differential LVPECL Buffer 8-SOIC -40 to 85Features 3 DescriptionThe SN65EPT22 is a low power dual LVTTL to1• Dual 3.3V LVTTL to LVPECL Buffer ..
SN65EPT23DR ,3.3V ECL Differential Receiver 8-SOIC -40 to 85 SLLS969A–NOVEMBER 2009–REVISED JANUARY 2011(1) (2)LVTTL OUTPUT DC CHARACTERISTICS (V = 3.3 V; GND ..
SN74HC273NSRG4 ,Octal D-Type Flip-Flops With Clear 20-SO -40 to 85Features 3 DescriptionThe SNx4HC273 devices are positive-edge-triggered1• Wide Operating Voltage Ra ..
SN74HC273PW ,Octal D-Type Flip-Flops With ClearMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITV S ..
SN74HC273PWR ,Octal D-Type Flip-Flops With ClearLogic Diagram, Each Flip-Flop (Positive Logic)CCDTGTGQCCCCTGCLK(I)TGCCCCRCopyright 2016, Texas Ins ..
SN74HC273PWRG4 ,Octal D-Type Flip-Flops With Clear 20-TSSOP -40 to 85 SCLS136E–DECEMBER 1982–REVISED JULY 20165 Pin Configuration and FunctionsJ, W, DB, DW N, NS, or PW ..
SN74HC27D ,Triple 3-Input Positive-NOR Gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74HC27DR ,Triple 3-Input Positive-NOR Gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN65ELT22DR
5V Dual TTL to Differential PECL Translator
1FEATURES
PIN ASSIGNMENT
APPLICATIONS 8 7CC000
SN65ELT22
www.ti.com............................................................................................................................................................................................ SLLS924–DECEMBER 2008
5-V Dual TTL-to-Differential PECL Translator 1.1-ns (max) Propagation Delay Operating Range: VCC= 4.2Vto 5.7V with Dor DGK PACKAGEGND=0V (TOP VIEW) < 50-ps (typ) Output-to-Output Skew Built-In Temperature Compensation Drop-Into the MC10ELT22,
MC100ELT22TSSOP-8
ORDERING INFORMATION(1)
PART NUMBER PART MARKING PACKAGE LEAD FINISHSN65ELT22D SN65ELT22 SOIC NiPdAu
SN65ELT22DGK SN65ELT22 SOIC-TSSOP NiPdAu
(1) Leaded device optionsarenot initially available; contacta sales representativefor further details
