SN54HC377J ,Octal, Hex, And Quad D-type Flip-Flops With Clock Enable SCLS307B– JANUARY 1996 – REVISED JANUARY ..
SN54HC393J ,Dual 4-Bit Binary Countersmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN54HC4002J ,Dual 4-Input Positive-NOR Gates. Package Options Include PlasticOutline" Packages. Ceramic Chand Standard Plastic and CeranDlPsq D ..
SN54HC4024J ,Asynchronous 7-Bit Binary Counters0 Package Options Include PlaOutline" Packages, Ceramicand Standard Plastic and CeDIPsq Dependable ..
SN54HC4040J ,Asynchronous 12-Bit Binary Countersmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN54HC42J ,4-Line To 10-Line Decoders BCD To Decimalmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74F280BNSR ,9-bit odd/even parity generators / checkers SDFS008A − D2932, APRIL 1986 − REVISED OCTOB ..
SN74F280BNSR ,9-bit odd/even parity generators / checkersmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F283N ,4-Bit Binary Full Adders With Fast Carrymaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F283NSR ,4-Bit Binary Full Adders With Fast Carrylogic diagram (positive logic)9C411B412A410Σ415B31314Σ3A32B21Σ23A26B14Σ15A17C0Pin numbers shown are ..
SN74F299DW ,Universal shift / storage registers/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74F299DWR ,Universal shift / storage registersmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN54HC377J
Octal, Hex, And Quad D-type Flip-Flops With Clock Enable
±4-mA Output Drive at 5 V
Low Input Current of 1 μA Max Eight Flip-Flops With Single-Rail Outputs Clock Enable Latched to Avoid FalseClocking Applications Include:
– Buffer/Storage Registers
– Shift Registers
– Pattern Generators
description/ordering informationThese devices are positive-edge-triggered octal
D-type flip-flops with an enable input. The ’HC377
devices are similar to the ’HC273 devices, but
feature a latched clock-enable (CLKEN) input
instead of a common clear.
Information at the data (D) inputs meeting the
setup time requirements is transferred to the
Q outputs on the positive-going edge of the clock
(CLK) pulse, if CLKEN is low. Clock triggering
occurs at a particular voltage level and is not
directly related to the transition time of the
positive-going pulse. When CLK is at either the
high or low level, the D input has no effect at the
output. These devices are designed to prevent
false clocking by transitions at CLKEN.
ORDERING INFORMATION†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.1QCLKEN8Q
GND
CLK
SN54HC377... FK PACKAGE
(TOP VIEW)GND
CLK
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
