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SN54AS138JTIN/a50avai3-Line To 8-Line Decoders/Demultiplexers


SN54AS138J ,3-Line To 8-Line Decoders/Demultiplexers SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDAS055E – ..
SN54AS161J , SYNCHRONOUS 4-BIT DECADE AND BINARY COUNTERS
SN54AS163J ,SYNCHRONOUS 4-BIT DECADE AND BINARY COUNTERS
SN54AS20J , DUAL 4-INPUT POSITIVE-NAND GATES
SN54AS245J ,Octal Bus Transceivers With 3-State Outputs SN54ALS245A, SN54AS245, SN74ALS245A, SN74AS245 OCTAL BUS TRANSCEIVERSWITH 3-STATE OUTPUTSSDAS272A ..
SN54AS245J ,Octal Bus Transceivers With 3-State Outputselectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
SN74F00DR ,Quad 2-input positive-NAND gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F00N ,Quad 2-input positive-NAND gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F00NSR ,Quad 2-input positive-NAND gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
SN74F02 ,Quad 2-input positive-NOR gateselectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
SN74F02D ,Quad 2-input positive-NOR gateselectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
SN74F02DR ,Quad 2-input positive-NOR gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..


SN54AS138J
3-Line To 8-Line Decoders/Demultiplexers
Package Options Include PlasticSmall-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs


description

The ′ALS138A and ′AS138 are 3-line to 8-line
decoders/demultiplexers designed for high-
performance memory-decoding or data-routing
applications requiring very short propagation
delay times. In high-performance systems, these
devices can be used to minimize the effects of
system decoding. When employed with
high-speed memories with a fast enable circuit,
the delay times of the decoder and the enable time
of the memory are usually less than the typical
access time of the memory. The effective system
delay introduced by the Schottky-clamped system
decoder is negligible.
The conditions at the binary-select (A, B, and C)
inputs and the three enable (G1, G2A, and G2B)
inputs select one of eight output lines. Two
active-low and one active-high enable inputs
reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without
external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input
for demultiplexing applications.
The SN54ALS138A and SN54AS138 are characterized for operation over the full military temperature range
of –55°C to 125°C. The SN74ALS138A and SN74AS138 are characterized for operation from 0°C to 70°C.
G2A
G2B
SN54ALS138A, SN54AS138... FK PACKAGE
(TOP VIEW)
ANCY5
GND
NC – No internal connection
G2A
G2B
GND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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