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SI3442DVFAIRCHILDN/a3000avaiN-Channel Logic Level Enhancement Mode Field Effect Transistor


SI3442DV ,N-Channel Logic Level Enhancement Mode Field Effect TransistorELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)ASymbol Parameter Conditions Min Typ Ma ..
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SI3442DV
N-Channel Logic Level Enhancement Mode Field Effect Transistor
March 2001 SI3442DV N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features These N-Channel logic level enhancement mode power field 4.1 A, 20 V.  R = 0.06 W @ V = 4.5 V DS(ON) GS effect transistors are produced using Fairchild's proprietary, R = 0.075 W @ V =2.7 V. DS(ON) GS high cell density, DMOS technology. This very high density TM process is tailored to minimize on-state resistance. These Proprietary SuperSOT -6 package design using copper devices are particularly suited for low voltage applications in lead frame for superior thermal and electrical capabilities. notebook computers, portable phones, PCMICA cards, and High density cell design for extremely low R . other battery powered circuits where fast switching, and low DS(ON) in-line power loss are needed in a very small outline surface Exceptional on-resistance and maximum DC current mount package. capability. ____________________________________________________________________________________________ 4 3 2 5 6 1 Absolute Maximum Ratings T = 25°C unless otherwise note A Symbol Parameter SI3442DV V Drain-Source Voltage 20 V DSS V Gate-Source Voltage - Continuous 8 V GSS Drain Current - Continuous (Note 1a) 4.1 A I D - Pulsed 15 P Maximum Power Dissipation (Note 1a) 1.6 W D (Note 1b) 1 (Note 1c) 0.8 T ,T Operating and Storage Temperature Range -55 to 150 °C J STG THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W R JA q Thermal Resistance, Junction-to-Case (Note 1) 30 °C/W R JC q © 2001 SI3442DV Rev. A
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