SG2525A-SG3525A Fast Delivery |IC PHOENIX CO.,LIMITED

SG2525A ,REGULATING PULSE WIDTH MODULATORSG2525ASG3525A REGULATING PULSE WIDTH MODULATORS.8 TO 35 V OPERATION. 5.1 V REFERENCE TRIMMED TO ± ..
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SG2525A-SG3525A
REGULATING PULSE WIDTH MODULATOR
SG2525A
SG3525A
REGULATING PULSE WIDTH MODULATORS.8 TO35V OPERATION. 5.1V REFERENCETRIMMED TO± 1%. 100Hz TO 500 KHz OSCILLATOR RANGE. SEPARATE OSCILLATORSYNCTERMINAL. ADJUSTABLE DEADTIME CONTROL. INTERNAL SOFT-START. PULSE-BY-PULSESHUTDOWN. INPUT UNDERVOLTAGE LOCKOUT WITH
HYSTERESIS. LATCHING PWM TO PREVENT MULTIPLE
PULSES. DUAL SOURCE/SINK OUTPUT DRIVERS
DESCRIPTION
The SG3525Aseriesof pulse widthmodulator inte-
grated circuits are designedto offer improved per-
formance and lowered external parts count when
usedin designingall typesof switching power sup-
plies. The on-chip+ 5.1V referenceis trimmedto±% andthe inputcommon-moderangeof the error
amplifier includesthe reference voltage eliminating
externalresistors.A sync inputto the oscillatoral-
lows multipleunitsto beslaved ora single unittobe
synchronizedtoan externalsystem clock.A single
resistor betweentheCT andthe dischargeterminals
providea wide rangeof dead time ad- justment.
Thesedevicesalsofeaturebuilt-insoft-startcircuitry
with onlyan external timing capacitor required.A
shutdownterminal controlsboth the soft-startcircu-
ity and the output stages, providing instantaneous
turnoff through the PWM latch with pulsed shut-
down,as wellas soft-start recycle with longer shut-
down commands. Thesefunctions are also control-
ledbyan undervoltagelockoutwhichkeepsthe out-
putsoff and the soft-start capacitor dischargedfor
sub-normal input voltages.This lockoutcircuitryin-
cludesapproximately500mVof hysteresisfor jitter-
free operation. Another featureof these PWM cir-
cuitsisa latch following the comparator. Oncea
PWM pulses has been terminatedfor any reason,
the outputswill remainofffor thedurationof the pe-
riod. The latchis reset with each clock pulse. The
output stages are totem-pole designs capableof
sourcingor sinkingin excessof 200 mA. The
SG3525AoutputstagefeaturesNOR logic, givinga
LOW outputforan OFF state.
DIP16 16(Narrow)
Type Plastic DIP SO16
SG2525A SG2525AN SG2525AP
SG3525A SG3525AN SG3525AP
PIN CONNECTIONS AND ORDERING NUMBERS (top view)
June 2000 1/12
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit Supply Voltage 40 V Collector Supply Voltage 40 V
IOSC Oscillator Charging Current 5 mA Output Current, Sourceor Sink 500 mA Reference Output Current 50 mA Current throughCT Terminal
Logic Inputs
Analog Inputs 0.3to+ 5.50.3toVi
Ptot Total Power Dissipationat Tamb =70°C 1000 mW Junction Temperature Range –55to 150 °C
Tstg Storage Temperature Range –65to 150 °C
Top Operating Ambient Temperature: SG2525A
SG3525A
–25to85
0to70
THERMAL DATA
Symbol Parameter SO16 DIP16 Unit
Rth j-pins
Rth j-amb
Rth j-alumina
Thermal Resistance Junction-pins Max
Thermal Resistance Junction-ambient Max
Thermal Resistance Junction-alumina (*) Max 50
°C/W
°C/W
°C/W Thermalresistancejunction-alumina withthedevicesolderedon themiddleofan aluminasupportingsubstratemeasuring15×20 mm; 0.65mm
thickness with infiniteheatsink.
BLOCK DIAGRAM
SG2525A-SG3525A
2/12
ELECTRICAL CHARACTERISTICS
(V#i=20V, and over operating temperature, unlessotherwise specified)
Symbol Parameter Test Conditions SG2525A SG3525A Unit
Min. Typ. Max. Min. Typ. Max.
REFERENCE SECTION
VREF Output Voltage Tj =25°C 5.05 5.1 5.15 5 5.1 5.2 V
ΔVREF Line Regulation Vi=8to35V 10 20 10 20 mV
ΔVREF Load Regulation IL=0to20 mA 20 50 20 50 mV
ΔVREF/ΔT* Temp. Stability Over Operating Range 20 50 20 50 mV Total Output Variation Line, Load and
Temperature 5.2 4.95 5.25 V
Short Circuit Current VREF =0Tj =25°C 80 100 80 100 mA Output Noise Voltage 10Hz≤f≤10 kHz, =25°C 200 40 200 μVrms
ΔVREF* Long Term Stability Tj= 125 °C, 1000 hrs 20 50 20 50 mV
OSCILLATOR SECTION**• Initial Accuracy Tj =25°C ±2 ±6 ±2 ± 6%• Voltage Stability Vi=8to35V ± 0.3 ±1 ±1 ± 2%
Δf/ΔT* Temperature Stability Over Operating Range ±3 ±6 ±3 ± 6%
fMIN Minimum Frequency RT= 200KΩCT= 0.1μF 120 120 Hz
fMAX Maximum Frequency RT =2 KΩCT= 470pF 400 400 KHz
Current Mirror IRT=2 mA 1.7 2 2.2 1.7 2 2.2 mA• Clock Amplitude 3 3.5 3 3.5 V• Clock Width Tj =25°C 0.3 0.5 1 0.3 0.5 1 μs
Sync Threshold 1.2 2 2.8 1.2 2 2.8 V
Sync Input Current Sync Voltage= 3.5V 1 2.5 1 2.5 mA
ERROR AMPLIFIER SECTION (VCM= 5.1V)
VOS Input Offset Voltage 0.5 5 2 10 mV Input Bias Current 1 10 1 10 μA
Ios Input Offset Current 1 1 μA Open Loop Gain RL≥10 MΩ 60 75 60 75 dB Gain Bandwidth
Product=0dB Tj =25 °C1 2 1 2 MHzz DC Transconduct. 30 KΩ≤RL≤ 1MΩ =25°C
1.1 1.5 1.1 1.5 ms
Output Low Level 0.2 0.5 0.2 0.5 V
Output High Level 3.8 5.6 3.8 5.6 V
CMR Comm. Mode Reject. VCM= 1.5to 5.2V 60 75 60 75 dB
PSR Supply Voltage
Rejection=8to35V 50 60 50 60 dB
SG2525A-SG3525A
3/12
ELECTRICAL CHARACTERISTICS (continued)
Symbol Parameter Test Conditions SG2525A SG3525A Unit
Min. Typ. Max. Min. Typ. Max.
PWM COMPARATOR
Minimum Duty-cycle 0 0 % Maximum Duty-cycle 45 49 45 49 % Input Threshold Zero Duty-cycle 0.7 0.9 0.7 0.9 V
Maximum Duty-cycle 3.3 3.6 3.3 3.6 V Input Bias Current 0.05 1 0.05 1 μA
SHUTDOWN SECTION
Soft Start Current VSD=0V, VSS=0V 2550 80 2550 80 μA
Soft Start Low Level VSD= 2.5V 0.4 0.7 0.4 0.7 V
Shutdown Threshold To outputs, VSS= 5.1V =25°C
0.6 0.8 1 0.6 0.8 1 V
Shutdown Input Current VSD= 2.5V 0.4 1 0.4 1 mA Shutdown Delay VSD= 2.5VTj =25°C 0.2 0.5 0.2 0.5 μs
OUTPUT DRIVERS (each output) (VC =20V)
Output Low Level Isink=20 mA 0.2 0.4 0.2 0.4 V
Isink= 100 mA 1 2 1 2 V
Output High Level Isource=20 mA 1819 1819 V
Isource= 100 mA 17 18 17 18 V
Under-Voltage Lockout Vcomp and Vss= High 6 7 8 6 7 8 V Collector Leakage VC=35V 200 200 μA
tr* Rise Time CL=1 nF,Tj =25°C 100 600 100 600 ns
tf* Fall Time CL=1 nF,Tj =25°C 50 300 50 300 ns
TOTAL STANDBY CURRENT Supply Current Vi=35V 14 20 14 20 mA These parameters, although guaranteed over therecommended operating conditions,arenot100% tested inproduction.• Testedatfosc =40KHz(RT=3.6 KΩ,CT =10nF,RD=0Ω). Approximateoscillator frequencyis definedby:f=
CT(0.7 RT+3RD)
.DC transconductance (gM)relatesto DCopen-loop voltage gain(Gv) accordingto thefollowingequation:Gv =gMRL whereRL isthe resistance
frompin9 toground. TheminimumgM specificationis usedtocalculate minimum Gvwhentheerror amplifieroutputis loaded.
SG2525A-SG3525A
4/12
TEST CIRCUIT
SG2525A-SG3525A
5/12
Figure1: Oscillator Charge Time vs. RT
and CT.
Figure2: Oscillator Discharge Time vs. RD
and CT.
RECOMMENDED OPERATINGCONDITIONS(•)
Parameter Value
Input Voltage (Vi) 8to35V
Collector Supply Voltage (VC) 4.5to35V
Sink/Source Load Current (steady state) 0to 100 mA
Sink/Source Load Current (peak) 0to 400 mA
Reference Load Current 0to20 mA
Oscillator Frequency Range 100Hzto 400 KHz
Oscillator Timing Resistor 2 KΩto 150 KΩ
Oscillator Timing Capacitor 0.001μFto 0.1μF
Dead Time Resistor Range 0to 500Ω (⋅) Range over whichthedeviceis functionaland parameter limitsare guaranteed.
Figure3: Output Saturation
Characteristics.
Figure4: Error Amplifier Voltage Gain and
Phasevs. Frequency.
SG2525A-SG3525A
6/12

Partno	Mfg	Dc	Qty	Available	Descript
SG2525A	ST	N/a	3332	avai	REGULATING PULSE WIDTH MODULATOR
SG3525A	ST	N/a	3104	avai	Regulating Pulse Width Modulators