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Infineon
technologies
SCARABAEUS+
SDA 9400
Scanrate Converter Using
Embedded Dram Technology Units
Potential Application
The SDA 9400 is a new component
of the Infineon MEGAVISION®IC
set for building mid and low TV sets
ta 100/120 Hz interlaced TV sets
ta 50/60 Hz Progressive Scan
TV sets
Features
ta Two Input Data Formats
-4:2:2 luminance and chromi-
nance parallel (2 x 8 wires)
- ITU-R 656 data format
(8 wires)
EI Flexible Compression of the
Input Signal
-Digital vertical compression of
the input signal (1.0, 1.25, 1.5,
1.75, 2.0, 3.0, 4.0)
-Digital horizontal compression
of the input signal (1.0, 2.0, 4.0)
u Noise Reduction
-Motion adaptive spatial and
temporal noise reduction
(3D-NR)
-Flexible programming of the
temporal noise reduction
parameters
-Automatic measurement of the
noise level (5 Bit value, readable
by 120 Bus)
a 3-D Motion Detection
- High performance motion detec-
tor for scan rate conversion
-Global motion detection flag
(readable by 120 Bus)
- Movie mode and phase detector
(readable by 12C Bus)
Embedded Memory
5 Mbit Embedded DRAM
Core for F rame Memory,
(2 Field Memories)
192 kbit Embedded DRAM
Core for Line Memories
Flexible Clock and Synchro-
niszation Concept
Scan Rate Conversion
- Motion adaptive 100/120 Hz
interlaced scan conversion
- Motion adaptive 50/60 Hz
progressive scan conversion
-Simple static interlaced and pro-
gressive conversion modes for
100/120 Hz interlaced or
50/60 Hz progressive scan
conversion: e.g. ABAB, AABB,
AA*B*B, AAAA, BBBB, AB, AA*
- Large area and line flicker
reduction
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Flexible Digital Vertical
Expansion of the Output
Signal (1.0, ...[1I32]..., 2.0)
Flexible Output Sync Controller
Signal Manipulations
- Insertion of coloured back-
ground
-Vertical and/or horizontal
windowing with four different
speed factors
- Flash generation (for supervis-
ing applications, motion flag
readable by ft Bus)
-Still fleld
-Support for split screen applica-
tions (PIP processor necessary)
- Still-in-moving picture,
Moving-in-still picture
(PIP processor necessary)
- Multiple picture display
-Tuner scan (4 and 16 times for
4:3, 12 times for 16:9 tubes)
(" http:/Iwww.infineon.com
Technical Data
El 120 Bus control (400 kHz) n 4:2:2 processing
a P-MQFP-64 package I: Embedded memory
I: 3.3 V , 5% supply voltage -5 Mbit embedded DRAM core
a 0.35 um CMOS technology for one frame r.T1epory
(2 feld memories)
-192 kbit embedded DRAM core
for line memories
Block Diagram SOA 9400
ISO MC : OSC
Input Sync Memory I Output Sync
Controller Controller I Controller
Vertical, eDRAM I
Horizontal _
IFC Decimation Interfaces ,' HDR OFC
Input Noise l Scan Rate Output
Format Reduction and Data Buffer ,' Conversion Format
Conversion Measurement l Conversion
Motion Voltage Control l Vertical
Detector l Interpolation
Motion Mode Test Controller l
17C and Phase : pLL 2
12c Bus 0electiim l Clock
Interface PLLl E Doubling
LM Clock Doubling ,' . LM
Line Memory l Line Memory
The SDA 9400 is a single core IC for 100 Hz containing all necessary blocks
The SDA 9400 contains all neces-
sary functional blocks on a single
n Flexible input sync controller
ta Input format conversion
I:I Low data rate processing
EI Memory controller
Application Example
Flexible output sync controller
Output format conversion
High data rate processing
12C Bus interface
PLL for frequency doubling
and in a leading edge technology
Mbit embedded DRAM for line
and fleld memories.
YUVIN Y
Analog U SOA HlNl SOA 8 SOA U
Colour _ 9206 9400 i> 9280 _
CVBS Decoder HOUT VOUT
':I> + ll ABACUS VIN1 SCARA- HREF‘ , Display- V
RGB _ BAEUS "-"-'F1 Processor _
SYNC CLK1=27MHZ CLKOUT
H-Drive
PIP SOA
CVBS Processor 936X V-Drive
" Deflection
SOA 9488 Controller
Application of a 100 Hr TV set
Availability
The SDA 9400 and a complete
documentation is available in
samples 1998. Mass produc-
tion is scheduled for Q2 1999.
A dedicated engineering sup-
port team is there to assist
you. Also an application
board is available. Please
contact your local Infineon
office for further details.
How to reach us:
http:llwww.infineon.com
Published by
Infineon Technologies AG,
Bereich Kommunikation,
StM8artin.Strasse 53,
D-81541 Miinchen
Q It1rIneon Technologies AG 1999
All Rights Reserved.
Attention please!
The information herein is given to describe cer-
tain components and shall not be considered as
warranted characteristics.
Terms of delivery and rights to technical change
reserved.
We hereby disclaim any and all warranties, in-
cluding but not limited to warranties of non-in-
fringement, regarding circuits, descriptions and
charts stated herein.
Inrineon Technologies is an approved CECC
manufacturer.
Information
For further information on technology, delivery
terms and conditions and prices please contact
your nearest InfIneon Technologies Ofhce in
Germany or our Infineon Technologies Repre-
sentatives worldwide (see address list).
Warnings
Due to technical requirements components may
contain dangerous substances. For information
on the types in question please contact your
nearest Infineon Technologies Omce.
Infineon Technologies Components may only be
used in life-support devices or systems with the
express written approval of Infineon Technologies,
if a failure of such components can reasonably
be expected to cause the failure of that life-sup-
port device or system, or to affect the safety or ef-
fectiveness of that device or system. Life support
devices or systems are intended to be implanted
in the human body, or to support and/or maintain
and sustain and/or protect human life. If they fail,
it is reasonable to assume that the health of the
user or other persons may be endangered.
Published by Infineon Technologies AG
Ordering No. B110-H7217-G1-X-7600
Printed in Germany
PS 08993.
