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SA639DH
Low voltage mixer FM IF system with filter amplifier and data switch
Product specification 1998 Feb 10
IC17 Data Handbook
Philips Semiconductors Product specification
SA639Low voltage mixer FM IF system with filter amplifier
and data switch
DESCRIPTIONThe SA639 is a low-voltage high performance monolithic FM IF
system with high-speed RSSI incorporating a mixer/oscillator, two
wideband limiting intermediate frequency amplifiers, quadrature
detector, logarithmic received signal strength indicator (RSSI), fast
RSSI op amps, voltage regulator, wideband data output, post
detection filter amplifier and data switch. The SA639 is available in
24-lead TSSOP (Thin shrink small outline package).
The SA639 was designed for high bandwidth portable
communication applications and will function down to 2.7V. The RF
section is similar to the famous NE605. The data output provides a
minimum bandwidth of 1MHz to demodulate wideband data. The
RSSI output is amplified and has access to the feedback pin. This
enables the designer to level adjust the outputs or add filtering.
The post-detection amplifier may be used to realize a low pass filter
function. A programmable data switch routes a portion of the data
signal to an external integration circuit that generates a data
comparator reference voltage.
SA639 incorporates a power down mode which powers down the
device when Pin 8 is high. Power down logic levels are CMOS and
TTL compatible with high input impedance.
APPLICATIONS DECT (Digital European Cordless Telephone) FSK and ASK data receivers
FEATURES VCC = 2.7 to 5.5V Low power consumption: 8.6mA typ at 3V Wideband data output (1MHz min.) Fast RSSI rise and fall times Mixer input to >500MHz Mixer conversion power gain of 9.2dB and noise figure of 11dB at
110MHz
PIN CONFIGURATION
Figure 1. Pin Configuration XTAL oscillator effective to 150MHz (L.C. oscillator to 1GHz local
oscillator can be injected) 92dB of IF Amp/Limiter power gain 25MHz limiter small signal bandwidth Temperature compensated logarithmic Received Signal Strength
Indicator (RSSI) with a dynamic range in excess of 80dB RSSI output internal op amp Post detection amplifier for filtering Programmable data switch Excellent sensitivity: 2.24μV into 50Ω matching network for 10dB
SNR (Signal to Noise Ratio) with RF at 110MHz and IF at 9.8MHz ESD hardened Power down mode
ORDERING INFORMATION
Philips Semiconductors Product specification
SA639Low voltage mixer FM IF system with filter amplifier
and data switch
BLOCK DIAGRAM
Figure 2. Block Diagram
ABSOLUTE MAXIMUM RATINGS
NOTE: Except logic input pins (Pins 8 and 12) which can have 6V maximum. θJA Thermal impedance (DH package) 117°C/W
DC ELECTRICAL CHARACTERISTICSVCC = +3V, TA = 25°C; unless otherwise stated.
Philips Semiconductors Product specification
SA639Low voltage mixer FM IF system with filter amplifier
and data switch
AC ELECTRICAL CHARACTERISTICSTA = 25°C; VCC = +3V, unless otherwise stated. RF frequency = 110.592MHz ;LO frequency = 120.392MHz; IF frequency = 9.8MHz; RF level
= -45dBm; FM modulation = 576kHz with ±288kHz peak deviation, discriminator tank circuit Q=4. The parameters listed below are tested using
automatic test equipment to assure consistent electrical characteristics. The limits do not represent the ultimate performance limits of the
device. Use of an optimized RF layout will improve many of the listed parameters.
Philips Semiconductors Product specification
SA639Low voltage mixer FM IF system with filter amplifier
and data switch
AC ELECTRICAL CHARACTERISTICS (Continued)
NOTES: Includes filter feedback capacitance, comparator input capacitance. PCB stray capacitances and switch input capacitance. Demodulator output DC coupled with Post Detection Filter Amplifier input and the demodulator tank exactly tuned to center frequency. Includes DC offsets due to frequency offsets between Rx and Tx carrier and demodulator tank offset due to mis-tuning. With a 400mVP-P sinusoid at 600kHz driving Pin 10. Output load resistance 500Ω in series with 10nF. With a DC input and capacitor in the RC load fully charged. The switch is closed every 10ms for a duration of 40μs. The DC offset is determined by calculating the difference of 2 DC measurements,
which are determined as follows: 1) The first DC value is measured at the integrating capacitor of the switch when the switch is in the closed
position immediately before it opens. The value to be measured is in the middle of the peak-to-peak excursion of the superimposed
sine-wave. (DClow + (DChigh – DClow)/2). 2) The second DC value (calculated as above) is measured at Pin 11 immediately after the
switch opens, and is the DC value which gives the largest DC offset to the first DC measurement within a 400μs DECT burst. Minimum and
maximum limits are not tested, however, they are guaranteed by design and characterization using an optimized layout and application
circuit. Standard deviations are measured based on application of 60 parts.
Philips Semiconductors Product specification
SA639Low voltage mixer FM IF system with filter amplifier
and data switch
CIRCUIT DESCRIPTIONThe SA639 is an IF signal processing system suitable for second IF
or single conversion systems with input frequency as high as 1GHz.
The bandwidth of the IF amplifier is about 40MHz, with 44dB(v) of
gain from a 50Ω source. The bandwidth of the limiter is about
28MHz with about 58dB(v) of gain from a 50Ω source. However, the
gain/bandwidth distribution is optimized for 9.8MHz, 330Ω source
applications. The overall system is well-suited to battery operation
as well as high performance and high quality products of all types,
such as digital cordless phones.
The input stage is a Gilbert cell mixer with oscillator. Typical mixer
characteristics include a noise figure of 11dB, conversion power gain
of 9.2dB, and input third-order intercept of -9.5dBm. The oscillator
will operate in excess of 1GHz in L/C tank configurations. Hartley or
Colpitts circuits can be used up to 100MHz for xtal configurations.
Butler oscillators are recommended for xtal configurations up to
150MHz.
The output of the mixer is internally loaded with a 330Ω resistor
permitting direct connection to a 330Ω ceramic filter. The input
resistance of the limiting IF amplifiers is also 330Ω. With most 330Ω
ceramic filters and many crystal filters, no impedance matching
network is necessary. To achieve optimum linearity of the log signal
strength indicator, there must be a 6dB(v) insertion loss between the
first and second IF stages. If the IF filter or interstage network does
not cause 6dB(v) insertion loss, a fixed or variable resistor can be
added between the first IF output (Pin 20) and the interstage
network.
The signal from the second limiting amplifier goes to a Gilbert cell
quadrature detector. One port of the Gilbert cell is internally driven
by the IF. The other output of the IF is AC-coupled to a tuned
quadrature network. This signal, which now has a 90° phase
relationship to the internal signal, drives the other port of the
multiplier cell.
Overall, the IF section has a gain of 90dB. For operation at
intermediate frequency at 9.8MHz. Special care must be given to
layout, termination, and interstage loss to avoid instability.
The demodulated output (DATA) of the quadrature is a low
impedance voltage output. This output is designed to handle a
minimum bandwidth of 1MHz. This is designed to demodulate
wideband data, such as in DECT applications.
Post Detection Filter AmplifierThe filter amplifier may be used to realize a group delay optimized
low pass filter for post detection. The filter amplifier can be
configured for Sallen & Key low pass with Bessel characteristic and
a 3dB cut frequency of about 800kHz.
The filter amplifier provides a gain of 0dB. The output impedance is
less than 500Ω in order to reduce frequency response changes as a
result of amplifier load variations. The filter amplifier has a 3dB
bandwidth of at least 4 MHz in order to keep the amplifier’s
frequency response influence on the filter group delay characteristic
at a minimum. At the center of the carrier it is mandatory to provide
a filter output DC bias voltage of 1.6V in order to be within the input
common mode range of the external data comparator. The filter
output DC bias voltage specification holds for an exactly center
tuned demodulator tank and for the demodulator output connected
to the filter amplifier input.
Data SwitchThe SA639 incorporates an active data switch used to derive the
data comparator reference voltage by means of an external
integration circuit. The data switch is typically closed for 10μs
before and during reception of the synchronization word pattern, and
is otherwise open. The external integration circuit is formed by an
R/C low pass with a time constant of 5 to 10μs.
The active data switch provides excellent tracking behavior over a
DC input range of 1.2 to 2.0V. For this range with an RC load (no
static current drawn), the DC output voltage will not differ more than
±5mV from the input voltage. Since the active data switch is
designed to behave like a non-linear charge pump (to allow fast
tracking of the input signal without slew rate limitations under
dynamic conditions of a 576kHz input signal with 400mVP-P and the
RC load), the output signal will have a 340mVP-P output with a DC
average that will not vary from the input DC average by more than
±10mV.
The data switch is able to sink/source 3mA from/to the external
integration circuit in order to minimize the settling time after long
power-down periods (DECT paging mode). In addition, during
power-down conditions a reference voltage of approximately 1.6V
will be used as the input to the switch. The switch will be in a low
current mode to maintain the voltage on the external RC load. This
will further reduce the settling time of the capacitor after power-up.
It should be noted that during power-down the switch can only
source and sink a trickle current (10μA). Thus, the user should
make sure that other circuits (like the data comparator inputs) are
not drawing current from the RC circuit.
The data switch provides a slew rate better than 1V/μs in order to
track with system DC offset from receive slot to receive slot (DECT
idle lock or active mode). When the data switch is opened the
output is in a tri-state mode with a leakage current of less than
100nA. This reduces discharge of the external integration circuit.
When powered-down, the data switch will output a reference of
approximately 1.6V to maintain a charge on the external RC circuit.
A Receive Signal Strength Indicator (RSSI) completes the circuitry.
The output range is greater than 80dB and is temperature
compensated. This log signal strength indicator exceeds the criteria
for DECT cordless telephone. This signal drives an internal op amp.
The op amp is capable of rail-to-rail output. It can be used for gain,
filtering, or 2nd-order temperature compensation of the RSSI, if
needed.
NOTE: dB(v) = 20log VOUT/VIN
Philips Semiconductors Product specification
SA639Low voltage mixer FM IF system with filter amplifier
and data switch
PIN FUNCTIONS All DC voltages measured with Pin 8 = Pin 12 = Pin 19 = 0V, Pin 5 = 3V and Pin 9 connected to Pin 10.
Philips Semiconductors Product specification
SA639Low voltage mixer FM IF system with filter amplifier
and data switch
PIN FUNCTIONS (continued)
