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OP97PMIN/a85avaiLow Power, High Precision Operational Amplifier


OP97 ,Low Power, High Precision Operational AmplifierSpecifications subject to change without notice.–2– REV. DOP971ABSOLUTE MAXIMUM RATINGS ORDERING GU ..
OP97AZ ,LOW POWER, HIGH PRECISION OPERATIONAL AMPLIFIERspecifications in several areas. Notable is bias current, which remains below 250PA over the full ..
OP97EJ ,Low-Power, High-Precision Operational AmplifierGENERAL DESCRIPTION : :gwogipply gurfrent ............-........................ GOOHA Max The OP-9 ..
OP97EP ,LOW POWER, HIGH PRECISION OPERATIONAL AMPLIFIERCHARACTERISTICS at Vs = A-MN, VCM = 0V, TA = +25°C, unless otherwise noted. (Continued.) 0P-97 ..
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OP97
Low Power, High Precision Operational Amplifier
REV.D
Low-Power, High-Precision
Operational Amplifier
PIN CONNECTIONS
Epoxy Mini-DIP (P Suffix)
8-Pin Cerdip
(Z Suffix)
8-Pin SO (S Suffix)
TO-99 ( J Suffix)
NULL 1
–IN 2
+IN 3
V– (CASE)
5 OVER
COMP
6 OUT
7 V+
NULL
OP97ARC/883 LCC
(RC Suffix)
FEATURES
Low Supply Current: 600
�A Max
OP07 Type Performance
Offset Voltage: 20
�V Max
Offset Voltage Drift: 0.6
�V/�C Max
Very Low Bias Current
25�C: 100 pA Max
–55�C to +125�C: 250 pA Max
High Common-Mode Rejection: 114 dB Min
Extended Industrial Temperature Range: –40�C to +85�C
Available In Die Form
GENERAL DESCRIPTION

The OP97 is a low power alternative to the industry-standard
OP07 precision amplifier. The OP97 maintains the standards of
performance set by the OP07 while utilizing only 600μA supply
current, less than 1/6 that of an OP07. Offset voltage is an
ultralow 25μV, and drift over temperature is below 0.6μV/°C.
External offset trimming is not required in the majority of circuits.
Improvements have been made over OP07 specifications in
several areas. Notable is bias current, which remains below
250pA over the full military temperature range. The OP97 is
ideal for use in precision long-term integrators or sample-and-
hold circuits that must operate at elevated temperatures.
Common-mode rejection and power supply rejection are also
improved with the OP97, at 114 dB minimum over wider
ranges of common-mode or supply voltage. Outstanding
PSR, a supply range specified from ±2.25 V to ±20 V and the
OP97’s minimal power requirements combine to make the
OP97 a preferred device for portable and battery-powered
instruments.
The OP97 conforms to the OP07 pinout, with the null potenti-
ometer connected between Pins 1 and 8 with the wiper to V+.
The OP97 will upgrade circuit designs using 725, OP05, OP07,
OP12, and 1012 type amplifiers. It may replace 741-type ampli-
fiers in circuits without nulling or where the nulling circuitry has
been removed.
OP97–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS

Long-Term Offset
Input Bias Current
Input Noise Voltage Density
Power-Supply Rejection
NOTESGuaranteed by CMR test.10 Hz noise voltage density is sample tested. Devices 100% tested for noise are available on request.Sample tested.Guaranteed by design.
Specifications subject to change without notice.
ELECTRICAL CHARACTERISTICS

Input Offset Current
Average Temperature
Large Signal Voltage Gain
Power Supply Rejection
NOTESGuaranteed by CMR test.
Specifications subject to change without notice.
(@ VS = �15 V, VCM = 0 V, TA = 25�C, unless otherwise noted.)
(@ VS = �15 V, VCM = 0 V, –40�C ≤ TA ≤ +85�C for the OP97E/F and –55�C ≤ TA ≤ +125�C
for the OP97A, unless otherwise noted.)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP97 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore,proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS1

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 V
Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 V
Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . . . ±1 V
Differential Input Current3 . . . . . . . . . . . . . . . . . . . . ±10 mA
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Operating Temperature Range
OP97A (J, Z, RC) . . . . . . . . . . . . . . . . . . . –55°C to +125°C
OP97E, F (J, P, Z, S) . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . 300°C
NOTESAbsolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.For supply voltages less than ±20 V, the absolute maximum input voltage is equal
to the supply voltage.The OP97’s inputs are protected by back-to-back diodes. Current-limiting resis-
tors are not used in order to achieve low noise. Differential input voltages greater
than 1 V will cause excessive current to flow through the input protection diodes
unless limiting resistance is used.θJA is specified for worst case mounting conditions, i.e., θJA is specified for device
in socket for TO, cerdip, and P-DIP packages; θJA is specified for device soldered
to printed circuit board for SO package.
ORDERING GUIDE

NOTESFor outline information see Package Information section.For devices processed in total compliance to MIL-STD-883, add /883 after
part number. Consult factory for /883 data sheet.
OP97
DIE CHARACTERISTICS
WAFER TEST LIMITS

NOTESGuaranteed by CMR test.
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
(@ VS = �15 V, VCM = 0 V, TA = 25�C, unless otherwise noted.)
TPC 1.Typical Distribution of Input
Offset Voltage
TPC 4.Input Bias, Offset Current
vs. Temperature
TPC 7.Effective Offset Voltage vs.
Source Resistance
TPC 2.Typical Distribution of Input
Bias Current
TPC 5.Input Bias, Offset Current
vs. Common-Mode Voltage
TPC 8.Effective TCVOS vs. Source
Resistance
TPC 3. Typical Distribution of Input
Offset Current
TPC 6. Input Offset Voltage
Warm-Up Drift
TPC 9.Short Circuit Current vs.
Time, Temperature
OP97TPC 10.Supply Current vs. SupplyVoltage
TPC 13.Open-Loop Gain vs. LoadResistance
Figure 16.Open-Loop Gain Linearity
TPC 11.Common-Mode Rejection
vs. Frequency
TPC 14.Noise Density vs.
Frequency
TPC 17.Maximum Output Swing
vs. Load Resistance
TPC 12.Power-Supply Rejection
vs. Frequency
TPC 15.Total Noise Density vs.
Source Resistance
TPC 18.Maximum Output Swing
vs. Frequency
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