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NDT3055LNSN/a534avaiN-Channel Logic Level Enhancement Mode Field Effect Transistor


NDT3055L ,N-Channel Logic Level Enhancement Mode Field Effect TransistorElectrical Characteristics (T = 25°C unless otherwise noted)ASymbol Parameter Conditions Min Typ Ma ..
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NDT3055L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
September 1996

NDT3055L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description Features

_______________________________________________________________________________________________
Absolute Maximum Ratings T
A = 25°C unless otherwise noted
Symbol Parameter NDT3055L Units
DSS Drain-Source Voltage 60 V
VGSS Gate-Source Voltage - Continuous ±20 VD Drain Current - Continuous (Note 1a) ±3.7 A
- Pulsed ±25 Maximum Power Dissipation (Note 1a) 3 W
(Note 1b) 1.3
(Note 1c) 1.1
TJ,TSTG Operating and Storage Temperature Range -65 to 150 °C
THERMAL CHARACTERISTICS
θJA Thermal Resistance, Junction-to-Ambient (Note 1a) 42 °C/WθJC Thermal Resistance, Junction-to-Case (Note 1) 12 °C/W
* Order option J23Z for cropped center drain lead.
Power SOT logic level N-Channel enhancement
mode field effect transistors are produced using
National's proprietary, high cell density, DMOS
technology. This very high density process is
especially tailored to minimize on-state resistance
and provide superior switching performance. These
devices are particularly suited for low voltage
applications such as DC motor control and DC/DC
conversion where fast switching, low in-line power
loss, and resistance to transients are needed.
3.7A, 60V. R DS(ON) = 0.12Ω @ VGS = 4.5V.
Low drive requirements allowing operation
directly from logic drivers. VGS(TH) < 2.0V.
High density cell design for extremely low R DS(ON).
High power and current handling capability in a
widely used surface mount package. SGG
ic,good price


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