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NDS8958
Dual N & P-Channel Enhancement Mode Field Effect Transistor
July 1996
NDS8958
Dual N & P-Channel Enhancement M ode Field Effect Transistor
General Description Features ________________________________________________________________________________
Absolute M aximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter N-Channel P-Channel UnitsVDSS Drain-Source Voltage 30 -30 VGSS Gate-Source Voltage 20 -20 VD Drain Current - C ontinuous (Note 1a) 5.3 -4 A
- Pulsed 20 -15D Power Dissipation for Dual Operation 2 W
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b) 1
(Note 1c) 0.9J,TSTG Operating and Storage Temperature Range -55 to 150 °C
THERMAL CHARACTERISTICSθJA Thermal R esistance, Junction-to-Ambient (Note 1a) 78 °C/W Thermal R esistance, Junction-to-Case (Note 1) 40 °C/W
These dual N- and P-Channel enhancement mode
power field effect transistors are produced using
National's proprietary, high cell density, DMOS
technology. This very high density process is
especially tailored to minimize on-state resistance
and provide superior switching performance.
These devices are particularly suited for low
voltage applications such as notebook computer
power management and other battery powered
circuits where fast switching, low in-line power
loss, and resistance to transients are needed.
N-Channel 5.3A, 30V, R DS(ON) =0.035Ω @ VGS =10V.
P-Channel -4.0A, -30V, RDS(ON)=0.065Ω @ VGS=-10V.
High density cell design or extremely low R DS(ON).
High power and current handling capability in a
widely used surface mount package.
Dual (N & P-Channel) MOSFET in surface mount
package.
