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NDP6051FAIN/a45avaiN-Channel Enhancement Mode Field Effect Transistor
NDP6051NSN/a250avaiN-Channel Enhancement Mode Field Effect Transistor


NDP6051 ,N-Channel Enhancement Mode Field Effect TransistorElectrical Characteristics (T = 25°C unless otherwise noted)CSymbol Parameter Conditions Min Typ Ma ..
NDP6051 ,N-Channel Enhancement Mode Field Effect Transistorapplications. ________________________________________________________ ..
NDP605B ,N-Channel Enhancement Mode Power Fleid Effect TransistorElectrical Characteristics To = 25''C unless otherwise noted Symbol TeatCondititms "mm Units ..
NDP6060 ,N-Channel Enhancement Mode Field Effect TransistorElectrical Characteristics (T = 25°C unless otherwise noted)CSymbol Parameter Conditions Min Typ Ma ..
NDP6060. ,N-Channel Enhancement Mode Field Effect TransistorElectrical Characteristics (T = 25°C unless otherwise noted)CSymbol Parameter Conditions Min Typ Ma ..
NDP6060L ,N-Channel Logic Level Enhancement Mode Field Effect TransistorFeaturesThese logic level N-Channel enhancement mode power 48A, 60V. R = 0.025Ω @ V = 5V. DS(ON) GS ..
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NDP6051
N-Channel Enhancement Mode Field Effect Transistor
May 1996 NDP6051 / NDB6051 N-Channel Enhancement Mode Field Effect Transistor General Description Features These N-Channel enhancement mode power field effect 48 A, 50 V. R = 0.022 W @ V = 10 V. DS(ON) GS transistors are produced using Fairchild's proprietary, high cell Critical DC electrical parameters specified at elevated density, DMOS technology. This very high density process has temperature. been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high Rugged internal source-drain diode can eliminate the need energy pulses in the avalanche and commutation modes. for an external Zener diode transient suppressor. These devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM 175°C maximum junction temperature rating. motor controls, and other battery powered circuits where fast High density cell design for extremely low R . DS(ON) switching, low in-line power loss, and resistance to transients 2 are needed. TO-220 and TO-263 (D PAK) package for both through hole and surface mount applications. ______________________________________________________________________________ D G S Absolute Maximum Ratings T = 25°C unless otherwise noted C Symbol Parameter NDP6051 NDB6051 Units V Drain-Source Voltage 50 V DSS V 50 V Drain-Gate Voltage (R < 1 MW) DGR GS V Gate-Source Voltage - Continuous ± 20 V GSS - Nonrepetitive (t < 50 µs) ± 40 P I Drain Current - Continuous 48 A D - Pulsed 144 100 W P Total Power Dissipation @ T = 25°C D C Derate above 25°C 0.67 W/°C T ,T Operating and Storage Temperature Range -65 to 175 °C J STG T Maximum lead temperature for soldering purposes, 275 °C L 1/8" from case for 5 seconds © 1997 NDP6051 Rev. C1
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