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NCP1200D100R2ONN/a79730avaiPWM Current-Mode Controller for Low-Power Universal Off-Line Supplies
NCP1203P100ONN/a16355avaiPWM Current-Mode Controller for Universal Off-Line Supplies Featuring Standby and Short Circuit Protection


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NCP1200D100R2-NCP1203P100
1A 600V Ultrafast Rectifier
AND8029/D
Ramp Compensation
for the NCP1200
Prepared by: Christophe Basso
ON Semiconductor
INTRODUCTION

As any current–mode controllers, the NCP1200 can be
subject to subharmonic oscillations. Oscillations take place
when the Switch–Mode Power Supply (SMPS) operates in
Continuous Conduction Mode (CCM) together with a
duty–cycle near or greater than 50%. For Discontinuous
Conduction Mode (DCM) designs, this normally does not
happen. However, at the lowest line levels and when the
SMPS is pushed to its upper output power capability, CCM
can engender these oscillations within the current loop. This
application note details how to properly cure this problem by
injecting the correct amount of ramp compensation.
Origin of the Problem

A current–mode power supply is a two–loop system: one
loop controls the inductor peak current while the other
monitors the output voltage. The current loop is actually
embedded into the voltage loop which fixes the final
current setpoint. In CCM operation, the action of the
current loop can be compared to a sample and hold device.
This sampling action creates a pair of RHP zeroes in the
current loop which are responsible for the boost in gain at
Fswitching/2 but also stress the phase lag at this point. If the
gain margin is too low at this frequency, any perturbation
in the current will make the system unstable since, as we
said, both voltage and current loops are embedded. You can
fight the problem by providing the converter with an
external compensation ramp. This ramp will oppose the
duty cycle action by lowering the current–loop DC gain,
correspondingly increasing the phase margin at
Fswitching/2, finally damping the high Q poles in the
Vout/Vcontrol transfer function. As other benefits of ramp
compensation, Ray Ridley [1] confirmed that an external
ramp whose slope is equal to 50% (mc = 1.5) of the inductor
downslope could nullify the audio susceptibility in a
BUCK converter, as already calculated by Holland [2]. As
more external ramp is added, the low frequency pole ωp
moves to higher frequencies while the double poles will be
split into two distinct poles. The first one will move
towards lower frequencies until it joins and combines with
the first low frequency pole at ωp. At this point, the
Lowering the Peaking

A current mode controlled SMPS exhibits one low
frequency pole,
Fswitching/2. These poles move in relation to the duty cycle
and the external compensation ramp, when present. The two
high frequency poles present a Q that depends on the
compensating ramp and the duty–cycle. Ridley
demonstrated that the Q becomes infinite at D = 0.5 with no
external ramp (mc = 1), confirming the inherent instability
of a CCM current–mode SMPS operating at a duty cycle
greater than 0.5. Below stands the definition of this quality
coefficient:� ·(mc
external ramp slope, Sn is the inductor on–time slope and
D′= 1 – D.
For designers, once the system’s Q has been determined,
they should look for the amount of ramp compensation that
will make this number equal to 1: mc
How to Create a Ramp?

On the NCP1200, you do not have access to any oscillator
sawtooth. However, you can easily charge a capacitor when
the gate drive is high, and immediately discharge it when the
MOSFET switches off. Figure 1a shows how to simply
generate a sawtooth from the gate drive:
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