MPC911 ,LOW-VOLTAGE 1:9 DIFFERENTIAL ECL/HSTL TO HSTL CLOCK DRIVER
MPC9140 ,1:18 LVCMOS FANOUT BUFFERBlock DiagramTable 1. Pin DescriptionsPin Name I/O FunctionBUF_IN I 3.3V CMOS clock inputSDRAM0:17 ..
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MPC9239EI , 900 MHz Low Voltage LVPECL Clock Synthesizer
MPC9239EI , 900 MHz Low Voltage LVPECL Clock Synthesizer
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MPC911
LOW-VOLTAGE 1:9 DIFFERENTIAL ECL/HSTL TO HSTL CLOCK DRIVER
SEMICONDUCTOR TECHNICAL DATA -
The MPC9111 is a low skew 1–to–9 differential HSTL compatible
output fanout buffer. The device is functionally equivalent to the
MC100LVE111 device. The device accepts either LVPECL or HSTL
compatible input levels and provides 9 low skew differential HSTL
compatible outputs. The device operates from a single 3.3V VCC supply. 800ps Part–to–Part Skew 250ps Output–to–Output Skew Open Emitter HSTL Compatible Outputs Differential Design 28–Lead PLCC 3.3V VCC
The MPC911 HSTL outputs are not realized in the conventional
manner. To minimize part–to–part and output–to–output skew the HSTL
compatible output levels are generated with an open emitter architecture.
The outputs are pulled down with 50Ω to ground rather than the typical
50Ω to VDDQ pullup of a “standard” HSTL output. Because the HSTL
outputs are pulled to ground the MPC911 does not utilize the VDDQ supply
of the HSTL standard. The output levels are derived from VCC, an internal
regulator minimizes the output level variation with VCC variations.
VEE
CLK_Sel
HSTL_CLK
VCC
HSTL_CLK
PECL_CLK
PECL_CLK
VCCO
Pinout: 28-Lead PLCC (Top View) Q0 Q1 VCCO Q1 Q2 Q2 Q7 Q6Q8 VCCO Q7 Q6
PIN NAMES
